Multistage unit magnetic storage structure and reading-writing method thereof
A storage structure and magnetic storage technology, applied in information storage, static memory, digital memory information, etc., can solve problems such as deterioration of read and write performance, and achieve the goals of reducing invalid writing, optimizing reliability, and reducing inter-level interference Effect
Active Publication Date: 2019-08-23
BEIHANG UNIV
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[0009] Aiming at the problem that the reading and writing performance of the traditional multi-level unit magnetic storage structure is further deteriorated when it is stacked to three bits mentioned in the above background, the present invention discloses a multi-level unit magnetic storage structure and its reading and writing method
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[0063] The substantive features of the present invention are further described with reference to the accompanying drawings. Detailed exemplary embodiments are disclosed herein, specific structural and functional details thereof are merely representative for purposes of describing exemplary embodiments, therefore, the invention may be embodied in many alternative forms and should not be construed To be limited only to the exemplary embodiments set forth herein, all changes, equivalents, and alternatives falling within the scope of the invention should be covered. Additionally, well-known elements, devices and subcircuits of the invention will not be described in detail or will be omitted so as not to obscure the relevant details of the embodiments of the invention.
[0064] 1A and B are schematic diagrams of the prior art continuous MLC structure and the corresponding TLC structure.
[0065] As shown in FIG. 1A , a continuous MLC is formed by stacking two magnetic tunnel junct...
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The invention discloses a multistage unit magnetic storage structure and a reading-writing method thereof. The storage unit is a strong spin track coupling material, a first magnetic tunnel junction,a second magnetic tunnel junction, a third magnetic tunnel junction and a first electrode which are vertically stacked from bottom to top, wherein two ends of the strong spin track coupling material are respectively plated with a second electrode and a third electrode, a bottom surface shape of the first magnetic tunnel junction is contained in an upper surface of the strong spin track coupling material, a bottom surface shape of the third magnetic tunnel junction is included in an upper surface of the second magnetic tunnel junction, the shape and the size of an upper surface of the first magnetic tunnel junction are identical to those of a bottom surface of the second magnetic tunnel junction, a free layer of the first magnetic tunnel junction is in contact with the strong spin track coupling material, relative positions of the free layer and a reference layer of the second and third magnetic tunnel junctions are the same as those of the first magnetic tunnel junction. The structureis advantaged in that through improving the unit structure and designing the corresponding reading-writing method, storage density is not only improved, inter-level interference can be reduced, the input step is further simplified, and reading performance of the device is optimized.
Description
[0001] 【Technical field】 [0002] The invention belongs to the technical field of spin memory, and in particular relates to a multi-level unit magnetic storage structure and a reading and writing method thereof, which are used to realize high-density storage. [0003] 【Background technique】 [0004] Magnetic random access memory (MRAM) based on electron spin has the advantages of fast access speed, strong radiation resistance and non-volatility, and is regarded as the most potential next-generation memory technology. The core device of the MRAM memory unit is the Magnetic Tunnel Junction (MTJ). Due to the limitations of the process and magnetic anisotropy, the current MTJ occupies a large area, resulting in low MRAM storage density. Although in recent years, perpendicular magnetic anisotropy MTJs have been used to construct MRAM, which has increased the storage density, it barely reaches the level of Gb capacity. [0005] In contrast, NAND flash technology uses a multi-level c...
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Login to View More IPC IPC(8): H01L27/22H01L43/08H01L43/12G11C11/15
CPCG11C11/15H10B61/00H10N50/01H10N50/10G11C11/5607G11C11/161G11C11/1675
Inventor 徐岩松王昭昊吴比赵巍胜
Owner BEIHANG UNIV