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Bonding structure and manufacturing method thereof

A manufacturing method and bonding structure technology, which can be used in semiconductor/solid-state device manufacturing, semiconductor/solid-state device components, semiconductor devices, etc., and can solve the problems of reducing the bonding strength between wafers, splintering, etc.

Active Publication Date: 2019-08-30
WUHAN XINXIN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] In the implementation of wafer-level packaging technology, it is necessary to ensure that the bonding interface between the wafers is completely bonded and there are no gaps during the bonding process, otherwise the bonding strength between the wafers will be reduced, and there will be problems in subsequent thinning or other processes. splinter risk

Method used

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  • Bonding structure and manufacturing method thereof
  • Bonding structure and manufacturing method thereof
  • Bonding structure and manufacturing method thereof

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Embodiment Construction

[0031] In order to make the above-mentioned purpose, features and advantages of the present application more obvious and understandable, the specific implementation manners of the present application will be described in detail below in conjunction with the accompanying drawings.

[0032] In the following description, a lot of specific details are set forth in order to fully understand the application, but the application can also be implemented in other ways different from those described here, and those skilled in the art can do it without violating the content of the application. By analogy, the present application is therefore not limited by the specific embodiments disclosed below.

[0033] Secondly, the present application is described in detail in combination with schematic diagrams. When describing the embodiments of the present application in detail, for the convenience of explanation, the cross-sectional view showing the device structure will not be partially enlarged...

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Abstract

The invention provides a bonding structure and a manufacturing method thereof. When bonding of the nth wafer and the (n-1)th wafer is performed, the first edge trimming can be performed from the bonding surface of the nth wafer, the width of the first edge trimming is Wn, and the width of the first edge trimming can be gradually increased along with the increase of the n, this is because that thewafer edge is not flat enough to form a gap between the wafers during bonding. After the edge of the wafer is trimmed, the uneven part at the edge of the nth wafer can be removed, the bonding surfaceof the nth wafer faces the bonding surface of the (n-1)th wafer to perform bonding of the nth wafer and the (n-1)th wafer to reduce the possibility of a gap formed between the bonding surfaces of thewafers, improve the bonding strength between the adjacent wafers, the nth wafer substrate is thinned to form the (n-1)th wafer stack, due to the fact that the bonding strength between the adjacent wafers is large, the formed wafer stack is high in reliability, and the risk of cracking is low.

Description

technical field [0001] The present application relates to the field of semiconductor devices and its manufacture, in particular to a bonding structure and its manufacturing method. Background technique [0002] With the continuous development of semiconductor technology, 3D-IC (three-dimensional integrated circuit) technology has been widely used. It uses wafer-level packaging technology to stack and bond wafers with different functions. This technology has high performance and low cost. The advantages of low cost and high integration. [0003] In the implementation of wafer-level packaging technology, it is necessary to ensure that the bonding interface between the wafers is completely bonded and there are no gaps during the bonding process, otherwise the bonding strength between the wafers will be reduced, and there will be problems in subsequent thinning or other processes. Risk of splintering. Contents of the invention [0004] In view of this, the object of the pres...

Claims

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Application Information

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IPC IPC(8): H01L21/02H01L21/603H01L23/48
CPCH01L24/82H01L24/08H01L21/02016H01L21/02021H01L2224/82895H01L2224/08145H01L2224/80895H01L2224/80896H01L2224/94H01L2224/8013H01L2224/09181H01L24/94H01L24/80H01L25/18H01L25/16H01L2924/00014H01L2224/80001H01L24/27H01L24/32H01L2924/3512
Inventor 曾甜
Owner WUHAN XINXIN SEMICON MFG CO LTD
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