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A bod circuit

A circuit and power supply voltage technology, applied in the field of BOD circuits, can solve the problems of large occupied area and high power consumption, and achieve the effects of reducing occupied area, reducing power consumption, and improving production capacity

Active Publication Date: 2022-01-14
SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the shortcomings of the prior art described above, the purpose of the present invention is to provide a BOD circuit for solving the problems of high power consumption and large occupied area of ​​traditional BOD circuits in the prior art

Method used

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Embodiment Construction

[0019] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0020] see Figure 1 to Figure 3 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arb...

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Abstract

The present invention provides a BOD circuit, the third to sixth PMOS transistors and the second and third NMOS transistors; wherein the source of the third PMOS transistor and the source of the sixth PMOS transistor are commonly connected to the power supply voltage; the third PMOS transistor The drain is connected to the source of the fourth PMOS transistor; the gates of the third and fourth PMOS transistors are connected to each other; the drain of the fourth PMOS transistor is connected to the source of the fifth PMOS transistor; the gate of the fifth PMOS transistor and The drain, the gate of the sixth PMOS transistor are connected to the drain, the gate of the second NMOS transistor, and the gate of the third NMOS transistor; the drain of the sixth PMOS transistor is connected to the drain of the third NMOS transistor; 2. The source of the third NMOS transistor is commonly grounded; the signal output terminal of the BOD circuit is between the drain of the sixth PMOS transistor and the drain of the third NMOS transistor. The BOD circuit of the present invention is improved on the basis of the traditional BOD circuit, and the reference current generating circuit and the current mirror circuit of the traditional BOD circuit are combined, which can effectively reduce power consumption and occupy an area, and is conducive to improving production capacity.

Description

technical field [0001] The invention relates to the field of circuit design, in particular to a BOD circuit. Background technique [0002] Such as figure 1 as shown, figure 1 It is a traditional BOD circuit, including the first to sixth PMOS transistors, the first to third NMOS transistors and two inverting amplifiers. Wherein, the sources of the first, third and sixth PMOS transistors are connected to the power supply voltage VPWR together, the source of the second PMOS transistor is connected to the drain of the first PMOS transistor, and the drain of the third PMOS transistor is connected to the drain of the fourth PMOS transistor. The sources of the fourth PMOS transistor are connected to each other; the drain of the fourth PMOS transistor is connected to the source of the fifth PMOS transistor; the gates of the fifth and sixth PMOS transistors are connected to the drain of the second NMOS transistor; the drain of the sixth PMOS transistor pole is connected with the d...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G01R19/00G01R19/165G01R31/40
CPCG01R19/0084G01R19/16519G01R31/40
Inventor 袁志勇
Owner SHANGHAI HUAHONG GRACE SEMICON MFG CORP