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DSP implementation method for ordered statistic CFAR

An implementation method and technology of the real part, which is applied in the field of DSP implementation of ordered statistical CFAR, can solve the problems of long sorting time and large calculation amount of OS-CFAR, and achieve the effect of shortening processing time, shortening processing time and reducing calculation amount.

Inactive Publication Date: 2019-10-25
CNGC INST NO 206 OF CHINA ARMS IND GRP
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Problems solved by technology

[0006] In traditional DSP software design, OS-CFAR has problems such as large amount of computation and long sorting time

Method used

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  • DSP implementation method for ordered statistic CFAR
  • DSP implementation method for ordered statistic CFAR

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Embodiment Construction

[0029] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:

[0030] The binary accumulation detection equivalent to the OS-CFAR process mentioned in the background technology is adopted to carry out DSP software design, and its principle block diagram is as follows figure 1 As shown, the in-phase signal I and the quadrature signal Q of the radar signal are taken as input, and the target information is taken as output. The in-phase signal I and the quadrature signal Q can be regarded as the real part and the imaginary part of the complex number respectively. Use the C / C++ Compiler Intrinsics instruction supported by the TMS320C6678 chip to perform the complex number modulo operation to obtain the amplitude information, and then binary the amplitude information Accumulate detection and finally obtain target information.

[0031] Refer to attached figure 2 , the specific embodiment of the present invention is described in ...

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Abstract

The invention relates to a DSP implementation method for ordered statistic CFAR. The DSP implementation method comprises the steps of: (a) inputting an in-phase signal I and an orthogonal signal Q; (b) selecting data to be detected, comprising a detection unit and N adjacent reference units; (c) calculating a detection unit amplitude and reference unit amplitudes; (d) multiplying the detection unit amplitude by a reciprocal of a threshold multiplication factor to obtain a decision threshold; (e) subjecting the N reference unit amplitudes and the decision threshold to binary decision respectively, and determining that a decision result is 0 if the reference unit amplitude is greater than the decision threshold, otherwise, the decision result is 1; (f) accumulating the N binary decision results to obtain a binary accumulation detection result; (g) regarding the detection unit as a target if the detection result is greater than K, otherwise, regarding the detection unit as clutter; (h) and outputting target information. The DSP implementation method can transform the OS-CFAR sequencing problem into a binary accumulation detection problem, thereby greatly reducing the computation load,shortening the processing time, and solving the real-time implementation problem of OS-CFAR in a DSP processor.

Description

technical field [0001] The invention belongs to the technical field of radar signal processing. The invention specifically relates to a DSP realization method of ordered statistical CFAR. The invention proposes a solution to the problems of long operation time and inconvenient real-time realization in the existing ordered statistical CFAR design. Background technique [0002] The research on constant false alarm probability detection is an important research direction in the field of international radar signal processing, and ordered statistical CFAR (OS-CFAR) is one of the important methods of constant false alarm probability detection, which can effectively suppress clutter edge effects and The target occlusion effect has good constant false alarm detection performance, but it is rarely used in early projects due to problems such as long sorting time and difficulty in real-time implementation. In recent years, with the widespread use of high-speed signal processors DSP, ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01S7/36G01S7/41
CPCG01S7/36G01S7/414
Inventor 李静静朱红育张楠张军张开生汪慧
Owner CNGC INST NO 206 OF CHINA ARMS IND GRP
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