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Thin Film Chip-on-Chip Packaging Structure

A technology of film-on-chip packaging and pins, which is applied in semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problems of difficult increase in the number of bumps and limited number of pins, etc., and reduce local sinking or bending , improve the quality, the effect of stress distribution average

Active Publication Date: 2021-02-19
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, limited by the size of the chip, pin width and spacing, the number of pins that can pass through is limited, making it difficult to increase the number of bumps at the output end of the chip

Method used

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  • Thin Film Chip-on-Chip Packaging Structure
  • Thin Film Chip-on-Chip Packaging Structure
  • Thin Film Chip-on-Chip Packaging Structure

Examples

Experimental program
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Embodiment Construction

[0048] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

[0049] figure 1 A schematic top view of a chip-on-film packaging structure according to an embodiment of the present invention is shown. figure 2 shown as figure 1 A partially enlarged schematic bottom view of the thin film chip-on-chip packaging structure shown. image 3 shown as figure 1 A schematic partial cross-sectional side view of the thin film chip-on-chip packaging structure. Please refer to figure 1 , figure 2 and image 3 , the film-on-chip packaging structure 10 of this embodiment includes a flexible circuit carrier 100 and a chip 200 . The flexible circuit carrier 100 includes a flexible substrate 110 and a circuit structure 120 . The flexible substrate 110 includes ...

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Abstract

The invention provides a film-on-chip packaging structure, which includes a flexible circuit carrier and a chip. The flexible circuit carrier includes a flexible substrate and a circuit structure. The flexible substrate includes opposite first and second surfaces, and the first surface includes a chip bonding area. The circuit structure is configured on the flexible substrate, and includes a plurality of first pins, a plurality of internal pins, a plurality of second pins and a plurality of conductive through holes. The first pins and the inner pins are arranged on the first surface. These second pins are arranged on the second surface. The internal pins are located in the chip bonding area and are electrically connected to the second pins respectively through the conductive vias. The first pins overlap with the second pins respectively. The chip is disposed in the chip bonding area, and includes a plurality of first bumps connected to the first pins and a plurality of second bumps connected to the inner pins.

Description

technical field [0001] The invention relates to a chip package structure, in particular to a film-on-chip package structure. Background technique [0002] With more and more functional requirements of electronic products, the integrated circuit density of chips continues to increase, and the number of pins on the flexible circuit carrier board of the film-on-chip packaging structure must also increase accordingly. The wiring of flexible substrates with single-sided circuits widely used in the past is getting more and more difficult. Therefore, flexible circuit substrates are beginning to be designed in the way of double-sided circuits. At present, most of the pins on the flexible substrate with double-sided circuits extend outward from the chip bonding area on the upper surface of the flexible substrate, and then guide the circuit to the bottom through conductive vias in the area outside the chip bonding area. surface pins. Generally speaking, the number of bumps at the ou...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L23/498
CPCH01L23/49805H01L23/49827H01L23/49838H01L2224/16225H01L2224/32225H01L2224/73204H01L2924/00
Inventor 黄仲均
Owner CHIPMOS TECH INC
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