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FPGA accelerator card management method and related device

A management method and accelerator card technology, which is applied in the directions of multi-programming devices, electronic digital data processing, resource allocation, etc., can solve the problems of increasing deployment costs and difficulties, so as to improve user experience, improve flexibility, and reduce costs and difficulties Effect

Inactive Publication Date: 2019-11-01
SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, additional development includes hardware redesign and addition of new features at the software level, increasing the cost and difficulty of deployment

Method used

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  • FPGA accelerator card management method and related device
  • FPGA accelerator card management method and related device
  • FPGA accelerator card management method and related device

Examples

Experimental program
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Embodiment Construction

[0041] The core of the application is to provide a management method, a management system, a chassis management device of a server, and a computer-readable storage medium for an FPGA accelerator card. The monitoring data is first collected through the BMC of the board card, and then the data is sent to the upper computer through the USB interface. Instead of using a dedicated interface for data transmission, the difficulty of monitoring and management and the cost of implementation are reduced.

[0042] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other e...

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PUM

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Abstract

The invention discloses an FPGA accelerator card management method, which comprises the steps of performing information acquisition on a sensor of an FPGA accelerator card by a board card BMC througha bus module and obtaining monitoring data; sending the monitoring data to an upper computer through a USB interface, executing monitoring management operation by an upper computer according to the received monitoring data, obtaining and sending out operation data; executing an operation on the FPGA accelerator card according to the received operation data so as to manage the FPGA accelerator card. The monitoring data is firstly collected through the board card BMC, and then the data is sent to the upper computer through the USB interface instead of a special interface for data transmission. Therefore, the monitoring management difficulty and the implementation cost are reduced. The invention further discloses a management system of the FPGA accelerator card, a case management device of the server and a computer readable storage medium, which have the above beneficial effects.

Description

technical field [0001] The present application relates to the technical field of server equipment management, and in particular to a management method of an FPGA accelerator card, a management system, a server chassis management device, and a computer-readable storage medium. Background technique [0002] In the era of big data, the amount of data processed by servers is constantly increasing. In order to ensure data processing efficiency, a heterogeneous computing architecture is usually used to maintain real-time data processing. Among them, the heterogeneous computing architecture refers to placing a large amount of parallel data in the CPU (Central Processing Unit, central processing unit) in the FPGA for processing through the FPGA (Field-Programmable Gate Array) accelerator card, and the CPU is responsible for Scheduling and control can meet the requirements of a large amount of data processing. At the same time, FPGA's low latency, low energy consumption ratio, high ...

Claims

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Application Information

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IPC IPC(8): G06F9/50G06F11/30
CPCG06F9/5027G06F11/3051G06F11/3089
Inventor 刘伟牟奇徐亚明
Owner SUZHOU LANGCHAO INTELLIGENT TECH CO LTD
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