A phase-locked loop circuit based on time register and its control method

Abstract

The invention relates to a phase-locked loop circuit based on a time register and a control method thereof. The phase-locked loop circuit comprises a frequency discriminator, a time register control circuit, a phase voltage converter, a sample hold circuit, a voltage-controlled oscillator and a frequency divider. The circuit has the advantages of being high in transportability, capable of tolerating extremely low working voltage, small in process influence, lower in occupied power consumption and fewer in chips. Compared with a traditional digital phase-locked loop, the phase-locked loop circuit does not have the stray problem caused by quantization errors.

Description

technical field [0001] The invention relates to the field of phase-locked loop circuit design, in particular to a phase-locked loop circuit based on a time register and a control method thereof. Background technique [0002] The current phase-locked loop circuit is generally divided into two categories: [0003] The first is an analog phase-locked loop based on a charge pump, such as figure 1 shown. Due to problems such as current mismatch, dead zone, and charge sharing of the charge pump used, reference clock spurs exist in the frequency spectrum of the clock signal output by the charge pump, and the spurs become more serious as the operating voltage decreases. Therefore, the phase-locked loop circuit cannot be applied to the situation of extremely low working voltage. In addition, the phase-locked loop circuit requires the use of a narrow bandwidth analog loop filter, thus occupying a large amount of chip area. [0004] The second is a digital phase-locked loop, such a...

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Problems solved by technology

However, due to the existence of quantization resolution problems, it cannot fundamentally eliminate the spurious problems introduced by quantization errors

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