Super-parallel comparison method and system
An algorithm and row data technology, applied in natural language, genetic engineering, information technology and biological engineering, image recognition, and biological sequence alignment sub-fields of protein engineering. Compliant with biometric equivalence issues
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specific Embodiment 1
[0189] Specific embodiment one: Biological sequence ultra-parallel comparison server
[0190] 1. Description of the module structure diagram
[0191] Such as Figure 5 It is an embodiment of the biological sequence super-parallel alignment server of the present invention. In the figure, two comparison units are used, among which the comparison unit 1 is larger, the entry width is 256 bytes, the depth is 1M entry rows, and 1 million entry rows are compared at a time in a single cycle; the comparison unit 2 is smaller, the entry width is 64 bytes, the depth is 16, and 16 entry lines are compared at a time in a single cycle. If it is a SAM file for biological sequences, the alignment can be done in Byte units. At this time, the following method is used: figure 2 The logical definition of the byte-based alignment unit shown, and Figure 4 Alignment array of and Figure 5 It is also a logical definition based on a byte-based comparison array; otherwise, it is a logical defini...
specific Embodiment 2
[0354] Specific embodiment two: PCIE card type overspeed comparison system
[0355] Such as Figure 6 As shown, this embodiment is another application of the present invention—the PCIE card type overspeed comparison system. What is the same as the previous embodiment will not be repeated here, and only the difference is emphasized here.
[0356] 1. Use TCAM chip or FPGA to design PCIE card type super speed comparison system. The system includes: comparator array, management module, shift controller, reconfigurable logic, memory and table entry mapping, and PCIE interface.
[0357] 2. This system needs to be inserted into the PCIE slot of the PC to run, and it does not have the ability to run independently.
[0358] 3. The system includes a comparison unit, which uses the built-in CPU and program design of the TCAM chip as the management module of the system.
[0359] 4. The management module of this system designs a management interface for the host PC.
[0360] 5. The en...
specific Embodiment 3
[0361] Specific embodiment three: general data overspeed comparison system
[0362] Such as Figure 6 As shown, this embodiment is another application of the present invention—a general data overspeed comparison system. What is the same as the previous embodiment will not be repeated here, and only the difference is emphasized here.
[0363] 1, Figure 4 The alignment array is defined using bit-alignment-based logic, such as figure 1 shown.
[0364] Therefore, for the step S109, the logic defines that the position is a bit, and the comparison is a bit-by-bit comparison in units of bits.
[0365] 2. For the comparison of image data, the width of the table item is suitable for the image size. For example, based on the 4K RGB three primary color video image format, when each picture is 3840*2160 pixels, the width of the table item is determined to be 3840*3* 24bits=270Kbits, the entry depth is 2160*3*24bits=151875bits=152Kbits, and the depth of the entry can also be increase...
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