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Commercial asymmetric cryptographic algorithm hardware module

An asymmetric cryptography and hardware module technology, applied in the field of large-capacity solid-state memory, can solve the problems affecting the read and write performance of the storage system, achieve good error correction ability, and improve the effect of read and write performance

Pending Publication Date: 2020-01-24
TIANJIN NAVIGATION INSTR RES INST
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  • Application Information

AI Technical Summary

Problems solved by technology

Aiming at the problem of data misalignment in large-capacity solid-state memory, software ECC models are usually used for inspection and error correction. However, using software models for inspection and error correction processing will inevitably greatly affect the read and write performance of the storage system

Method used

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  • Commercial asymmetric cryptographic algorithm hardware module

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Embodiment Construction

[0012] The implementation of the present invention will be described in further detail below in conjunction with the accompanying drawings.

[0013] A commercial asymmetric cryptographic algorithm hardware module, such as figure 1 As shown, it includes a check code generation module, an error location module and a finite state control logic module. The above modules are implemented by an FPGA chip and connected to the NAND Flash main controller and the NAND Flash chip. The above module captures read and write signals and data through the control line and data line, and enables and disables the ECC verification function by setting or resetting the corresponding register. When no work is required, the present invention directly receives the signal of the NAND Flash main controller And transmit to NAND Flash chip, when needing to work, the present invention intercepts the control signal of NAND Flash main controller, transmits to NANN Flash chip after analyzing and processing. T...

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Abstract

The invention relates to a commercial asymmetric cryptographic algorithm hardware module. The technical characteristic is that the asymmetric cryptographic algorithm hardware module comprises a checkcode generation module, an error positioning module and a finite state control logic module which are installed on an FPGA. The modules are connected to an NAND Flash main controller and an NAND Flashchip, read-write signals and data are captured through a control line and a data line, and the ECC verification function is enabled and forbidden by setting or resetting corresponding registers. Thedesign is reasonable, the FPGA hardware structure is adopted in the method, the check code generation module, the error positioning module and the finite state control logic module are matched with anNAND Flash main controller and an NAND Flash chip; the ECC function is achieved, the good error correction capacity is achieved, the read-write performance of a storage system is remarkably improved,and the method can be widely applied to large-capacity solid-state memories.

Description

technical field [0001] The invention belongs to the technical field of large-capacity solid-state memory, in particular to a commercial asymmetric cryptographic algorithm hardware module. Background technique [0002] In recent years, in high-speed data exchange equipment, because solid-state memory uses transistors to store data, at high frequencies, solid-state memory can perform very fast data exchange. Therefore, solid-state memory has been more and more widely used. During the use of large-capacity solid-state memory, there is a problem of data misalignment. Aiming at the problem of data misalignment in large-capacity solid-state memory, software ECC models are usually used for inspection and error correction. However, using software models for inspection and error correction processing will inevitably greatly affect the read and write performance of the storage system. Contents of the invention [0003] The purpose of the present invention is to overcome the shortco...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10
CPCG06F11/1048G06F11/1012
Inventor 高金超杨晓龙
Owner TIANJIN NAVIGATION INSTR RES INST