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Circuitry to process interrupt priorities

A circuit system and priority technology, applied in the field of system-on-chip, can solve the problems affecting the real-time processing of the system

Active Publication Date: 2020-01-31
REALTEK SEMICON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, this method disables high-priority interrupts while prohibiting low-priority interrupts, which greatly affects the real-time performance of system processing.

Method used

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  • Circuitry to process interrupt priorities
  • Circuitry to process interrupt priorities
  • Circuitry to process interrupt priorities

Examples

Experimental program
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Embodiment 1

[0033] image 3 The example shown is the interrupt priority processing flow executed when a high priority interrupt occurs when the system is processing a common task.

[0034] When the system processor is performing general tasks, such as task A (step S301), then a high priority interrupt occurs, and this type of interrupt is often processed in real time or urgent tasks, and the system processes high priority interrupts in real time (step S303) .

[0035] For example, the work of high-priority interrupt is to access a critical area, but the rule design of the system is to make the high-priority interrupt always open, but prohibit its processing function from accessing the critical area. Therefore, the processor then sets the low Priority interrupt (step S305), allowing the system to handle low priority interrupts, for example, allowing low priority interrupts to access and process critical section data (step S307) to be accessed by high priority interrupts, when the access i...

Embodiment 2

[0037] Figure 4 The example shown shows the interrupt priority processing flow of a high-priority interrupt occurring while processing a low-priority interrupt by the processor in the SoC.

[0038] When processor is processing the task of low priority interrupt (step S401), receives the signal of high priority interrupt, promptly takes over processing high priority interrupt (step S403), afterward, when processing high priority interrupt, pass and The method of low-priority interrupt communication completes the transfer of message (step S405), and continues to process the task of low-priority interruption (step S407), then checks whether the task of high-priority interruption before is completed and judges whether to wake up task B (step S409 ), if there is still high-priority interrupt work unfinished, the system will delegate task B (step S411), allowing task B to continue to complete the remaining work of the high-priority interrupt.

[0039] According to the above embodi...

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Abstract

The invention discloses a circuitry to process interrupt priority. The circuitry is a system on chip (SoC). In the interrupt priority processing method, when a processor in the system-on-chip executeswork, a high priority interrupt for accessing a critical zone is receive, high-priority interruption of the system is designed to be constant on, but access to critical zones is prohibited, thus, a low-priority interrupt is set to access and process the data to be accessed by the high-priority interrupt, after the low-priority interrupt is returned, the processor judges whether to wake up the work which is not completely processed by the high-priority interrupt before, and if the work still exists, the processor continues to process the work which is not completely processed by the high-priority interrupt with a task. The disclosed circuitry may also maintain real-time performance of the system in handling important tasks in addition to maintaining characteristics related to interruptions.

Description

technical field [0001] A circuit system for interrupt processing, especially a system-on-chip with an interrupt priority mechanism proposed in order to achieve some high-priority interrupts are always turned on during processing and maintain related interrupt characteristics. Background technique [0002] System on Chip (SoC) is a single chip that integrates multiple functional systems, and is widely used by chip designers. When designing a system on chip, multiple subsystems (subsystems) or subsystems of subsystems are provided. Systems and subsystems communicate with each other through the system bus (bus). [0003] Because the subsystems in the SoC share common data with each other, traditionally, the subsystems communicate with each other in a trigger interrupt manner as a mechanism for controlling data access. Described interruption is handled by the interrupt controller (interrupt controller) of central processing unit (CPU) in the system, and interrupt controller is ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/26
CPCG06F13/26G06F9/4812G06F9/4818G06F2213/2412
Inventor 费晓行费善健
Owner REALTEK SEMICON CORP
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