Graphene as interlayer dielectric

Abstract

An integrated circuit may include multiple back-end-of-line (BEOL) interconnect layers. The BEOL interconnect layers may include conductive lines and conductive vias. The integrated circuit may further include an interlayer dielectric (ILD) between the BEOL interconnect layers. The ILD may include the conductive lines and the conductive vias. At least a portion of the ILD may include a low-K insulating graphene alloy.

Description

[0001] Cross references to related applications [0002] This application claims the benefit of US Provisional Patent Application No. 62 / 522,024 entitled "GRAPHENE ASINTERLAYER DIELECTRIC" filed on June 19, 2017, the disclosure of which is expressly incorporated herein by reference in its entirety. Technical field [0003] Aspects of the present disclosure relate to semiconductor devices, and more specifically to interlayer dielectrics. Background technique [0004] Interconnect layers are commonly used to connect different devices on integrated circuits together. As integrated circuits become more and more complex, more interconnect layers are used to provide electrical connections between devices. Recently, due to the large number of transistors that are now interconnected in modern electronic devices, the number of interconnection levels used in circuits has increased substantially. The interconnection level used to support the increased number of transistors involves more comp...

AI Technical Summary

Problems solved by technology

Reducing the geometry and "pitch" (spacing) between interconnects can cause the interconnects to interfere with each other and affect normal operation

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