Neural network calculation special circuit and related calculation platform and implementation method thereof

A technology of neural network and special circuit, which is applied in the field of special circuit for neural network calculation, and can solve the problems of not being able to meet practical requirements, multi-computing and memory resources, etc.

Active Publication Date: 2020-02-07
XILINX TECH BEIJING LTD
View PDF6 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Although ANN-based methods have advanced performance, they require more computational and memory resources than traditional methods
Especially with the development of neural networks, large-scale neural networks have more and more layers and data volumes, and the use of traditional CPU platforms can no longer meet their practical needs.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Neural network calculation special circuit and related calculation platform and implementation method thereof
  • Neural network calculation special circuit and related calculation platform and implementation method thereof
  • Neural network calculation special circuit and related calculation platform and implementation method thereof

Examples

Experimental program
Comparison scheme
Effect test

example 1

[0094] Example 1: Taking a Separable convolution layer of the Xception network as an example, to do Separable convolution, first do depthwise convolution. The number of channels in this layer is 128, the convolution kernel size is 3x3, and the step size is 1x1.

[0095] The depthwise convolution here can be realized by using the special circuit of the present invention: first, send instructions to the instruction control module, and configure the number of channels, convolution kernel size, step size, data source address, result address and other information to each module, and configure the instruction type For depthwise convolution, the instruction starts to execute. The data reading module reads the image, weight, and bias data from the cache according to the instruction requirements, the data calculation module performs convolution operation according to the size of the convolution kernel, and the data write-back module writes the calculation result back to the on-chip cach...

example 2

[0096] Example 2: Take a max pooling layer of Xception as an example. This layer is a maximum pooling operation. The pooling size is 3x3, the step size is 2x2, and the number of channels is the same as that of the previous layer (128). This layer can be used The implementation of the special circuit of the present invention: firstly send instructions to the instruction control module, configure the channel number, pooling size, step size, data source address, result address and other information to each module, the instruction type is configured as maximum value pooling, and the instruction start execution. The data reading module reads the image data from the cache according to the instruction and sends it to the calculation module. The calculation module takes the maximum value of the input data according to the pool size and sends the result data to the data write-back module. The data write-back module will calculate The results are written back to the on-chip cache, and t...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a special circuit for a neural network and a related computing platform and implementation method thereof. The special circuit comprises: a data reading module which comprisesa feature map reading sub-module and a weight reading sub-module which are respectively used for reading feature map data and weight data from an on-chip cache to a data calculation module when a depthwise convolution operation is executed, wherein the feature map reading sub-module is also used for reading the feature map data from the on-chip cache to the data calculation module when executing pooling operation; a data calculation module which comprises a dwconv module used for executing depthwise convolution calculation and a pooling module used for executing pooling calculation; and a datawrite-back module which is used for writing a calculation result of the data calculation module back to the on-chip cache. The use of hardware resources is reduced by multiplexing the read logic andthe write-back logic of the two types of operations. The special circuit provided by the invention adopts a high-concurrency pipeline design, so that the computing performance can be further improved.

Description

technical field [0001] The present invention relates to the field of hardware architecture, in particular to a special circuit for neural network calculation and its related computing platform and implementation method. Background technique [0002] In recent years, methods based on artificial neural networks (ANN, Artificial Neural Network), especially convolutional neural networks (CNN, Convolutional Neural Network) have achieved great success in many applications. In the field of computer vision, especially for image classification problems, the introduction of CNN has greatly improved the accuracy of image classification. [0003] Although ANN-based methods have advanced performance, they require more computational and memory resources than traditional methods. Especially with the development of neural networks, large-scale neural networks have more and more layers and data volumes, and traditional CPU platforms cannot meet their practical needs. Therefore, using FPGA,...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Applications(China)
IPC IPC(8): G06N3/04G06N3/08G06T1/20
CPCG06N3/08G06T1/20G06N3/045
Inventor 张玉贾希杰隋凌志吴迪
Owner XILINX TECH BEIJING LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap