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High-speed voltage-withstanding level conversion circuit

A technology for converting circuits and levels, which is applied in the field of microelectronics and can solve problems such as increased propagation delays

Active Publication Date: 2020-02-14
CHONGQING UNIV OF POSTS & TELECOMM
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The traditional level conversion circuit has a simple structure and is easy to implement, but it can only work in a specific range. The working power supply voltage must be within the withstand voltage range of a single transistor, a

Method used

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  • High-speed voltage-withstanding level conversion circuit
  • High-speed voltage-withstanding level conversion circuit
  • High-speed voltage-withstanding level conversion circuit

Examples

Experimental program
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Embodiment

[0022] A high-speed withstand voltage level conversion circuit, such as figure 2 As shown, it includes a level conversion core circuit 1 and an output inverter 2;

[0023] Wherein, the signal output terminal of the level conversion core circuit 1 is connected to the signal input terminal of the output inverter 2; the level conversion core circuit 1 adopts 4 NMOS tubes and 2 PMOS tubes as input drivers High-speed conversion performance is achieved by technologies such as transistors and latches formed by cross-coupled pairs of transistors, and the MOS transistor stack structure is used to improve the circuit's withstand voltage performance, thereby realizing a high-speed withstand voltage level conversion circuit.

[0024] As a preferred technical solution, such as figure 2 As shown, the level conversion core circuit 1 includes: NMOS transistor M1, NMOS transistor M2, NMOS transistor M3, NMOS transistor M4, PMOS transistor M5, PMOS transistor M6, PMOS transistor M7, PMOS tra...

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PUM

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Abstract

The invention discloses a high-speed voltage-withstanding level conversion circuit. The high-speed voltage-withstanding level conversion circuit comprises a level conversion core circuit and an outputinverter. Six MOS tubes including an NMOS transistor M1, an NMOS tube M2, an NMOS tube M3, an NMOS tube M4, a PMOS tube M11, a PMOS tube M12 and the like are used as input driving tubes, and a latchis formed by a cross-coupled pair transistor PMOS tube M7 and a PMOS tube M8, so that high-speed conversion performance is realized. An MOS tube stack structure is adopted to improve the voltage withstanding performance of the circuit, and meanwhile, the source electrode of a PMOS tube M15 in an output inverter is connected with an external high power supply 2VDD and the source electrode of an NMOS tube M16 is connected with an external low power supply VDD, so that a high-speed voltage withstanding level conversion circuit is realized.

Description

technical field [0001] The invention belongs to the technical field of microelectronics, and in particular relates to a high-speed withstand voltage level conversion circuit. Background technique [0002] With the rapid development of microelectronic integrated circuit technology, system on chip (System on Chip, SoC) has become more and more powerful, and analog integrated circuits and digital integrated circuits are integrated on the same chip. Different functional modules in the SoC work at non-operating power supply voltages, so that data exchange between different voltage domains requires a level conversion circuit, and the performance of the level conversion circuit will affect the performance characteristics of the SoC. [0003] figure 1 It is a traditional level conversion circuit. The voltage of the external power supply VDDH is higher than the voltage of the external power supply VDDL. When the input voltage of the input terminal Vin is the voltage of the external ...

Claims

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Application Information

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IPC IPC(8): H03K19/0175H03K19/0185
CPCH03K19/017509H03K19/018507Y02B70/10
Inventor 周前能谢吉辉李红娟
Owner CHONGQING UNIV OF POSTS & TELECOMM