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Methods and systems for compensating degradation of resistive memory device

A resistive memory, memory cell technology, applied in static memory, read-only memory, digital memory information and other directions, can solve the problems of resistive memory device storage device capacity reduction, time overhead, multiple bit errors, etc.

Pending Publication Date: 2020-02-21
SAMSUNG ELECTRONICS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

As a result, time overhead or multiple bit errors can result, which means that sensing of set or reset data becomes less reliable or slower
Deterioration of a resistive memory device results in reduced capacity of a memory device including the resistive memory device

Method used

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  • Methods and systems for compensating degradation of resistive memory device
  • Methods and systems for compensating degradation of resistive memory device
  • Methods and systems for compensating degradation of resistive memory device

Examples

Experimental program
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Effect test

Embodiment Construction

[0027] figure 1 is a block diagram of a memory system 1 according to some example embodiments. The memory system 1 may be included in an electronic device, a computing device, or the like.

[0028] refer to figure 1 , the memory system 1 may include a memory device 10 and a memory controller 20 . Memory controller 20 may be implemented by one or more instances of circuitry, including an instance of processing circuitry (eg, a processor device). The memory device 10 may include a memory cell array 11 , a write / read circuit 12 and a control circuit 13 . It should be understood that the memory device 10 described herein may be a resistive memory device.

[0029] The memory controller 20 may control the memory device 10 to read data from or write data to the memory device 10 in response to a read / write request from the host. The memory controller 20 may control program (eg, write) and read operations with respect to the memory device 10 by providing an address ADDR, a command...

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PUM

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Abstract

A memory controller may control a resistive memory device including memory cells may control the resistive memory device to program the memory cells into a first resistance state, control the resistive memory device to read data from the memory cells that are programmed, receive bit error rates (BER) of the memory cells, occurring in a read operation, from the resistive memory device, may determine the number of program operations on the memory cells corresponding to the BER and may, based on the number of program operations that is determined, control the memory cells to be programmed into the first resistance state by using a write current having a current level higher than that of a minimum write current required for the memory cells to be changed into the first resistance state.

Description

[0001] Cross References to Related Applications [0002] This application claims the benefit of Korean Patent Application No. 10-2018-0092049 filed with the Korean Intellectual Property Office on Aug. 7, 2018, the disclosure of which is incorporated herein by reference in its entirety. technical field [0003] The inventive concepts relate to nonvolatile memory devices, and more particularly, to methods of compensating for degradation of resistive memory devices. Background technique [0004] Resistive memory devices such as Phase Change RAM (Phase Change RAM, PRAM), Resistive RAM (Resistive RAM, RRAM), and Magnetic RAM (Magnetic RAM, MRAM) are called non-volatile memory devices. In such resistive memory devices, variable resistive devices that store data according to changes in resistance conditions are used as memory cells. Resistive memory devices include cross-point type resistive memory devices. A cross-point type resistive memory device may be formed by placing memor...

Claims

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Application Information

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IPC IPC(8): G11C13/00
CPCG11C13/004G11C13/0069G11C13/0097G11C11/5628G11C11/5642G11C16/3495H10N70/8836H10N70/231H10N70/8828H10N70/8833H10N70/826G11C13/0035G11C2211/5644G11C11/1673G11C11/5607G11C11/5678G11C11/5685G11C13/0004G11C13/0007G11C2013/0078G11C2213/52G11C2213/32G11C11/1675H10N70/841
Inventor 白承柔朱汉城金起圣
Owner SAMSUNG ELECTRONICS CO LTD
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