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Analog switch for realizing multi-port over-negative pressure in power-consumption-free chip

An analog switch, multi-port technology, applied in electronic switches, electrical components, pulse technology, etc., can solve the problems of reducing integration, increasing cost, occupying system space, etc., achieving the effect of simple implementation and increased power consumption

Active Publication Date: 2020-02-21
SG MICRO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The inventors found that although a negative voltage power supply can be used to provide the required negative voltage, in most cases, the system cannot provide such a negative voltage power supply
If an additional circuit such as a negative pressure charge pump circuit is used to generate a negative pressure inside the chip to serve as the negative voltage power supply, this will increase the complexity of the chip and increase the cost. At the same time, the negative voltage circuit will have a certain power consumption. However, ordinary CMOS analog switches have no power consumption during normal operation.
If an external circuit is used to make the analog switch that cannot switch the negative pressure exceed the negative pressure, this method is to change the application environment, and the system needs to add additional circuits for this, occupying the system space and reducing the integration level.
If you compare the ground potential with an input or output terminal that will be over-negative, choose the lower potential of the two to provide to the substrate of the switch NMOS transistor, because only two ports can be compared at a time, the number of inputs and outputs should not be too large There are many, and the combination of input and output must be simple, because it is very complicated to determine the negative voltage potential by comparing with each other. For analog switches with more input and output ports, this method cannot be used at all.

Method used

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  • Analog switch for realizing multi-port over-negative pressure in power-consumption-free chip

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Embodiment Construction

[0014] Below with the accompanying drawings ( figure 1 ) to illustrate the present invention.

[0015] figure 1 It is a schematic diagram of the structure and principle of an analog switch for realizing multi-port over-negative pressure in a non-power consumption chip of the present invention. Such as figure 1 As shown, an analog switch that realizes multi-port over-negative pressure in a non-power consumption chip includes a switch unit (such as figure 1 The CMOS analog switch PMOS transistor MP and the CMOS analog switch NMOS transistor MN in the middle left virtual box), the drain of the CMOS analog switch PMOS transistor MP and the drain of the CMOS analog switch NMOS transistor MN are connected to the CMOS analog switch input voltage Terminal VIN, the source of the CMOS analog switch PMOS transistor MP and the source of the CMOS analog switch NMOS transistor MN are connected to the CMOS analog switch output voltage terminal VOUT, and the gate of the CMOS analog switch ...

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Abstract

The invention discloses an analog switch for realizing multi-port over-negative pressure in a power-consumption-free chip, capable of enabling a CMOS analog switch to realize negative voltage signal switching without providing a negative supply, increasing power consumption and adding a circuit outside a chip. The analog switch is characterized in that the analog switch comprises a CMOS analog switch PMOS transistor and a CMOS analog switch NMOS transistor which form a switch unit; the drain electrode of the CMOS analog switch PMOS transistor and the drain electrode of the CMOS analog switch NMOS transistor are both connected with the input voltage end of the CMOS analog switch; the source electrode of the CMOS analog switch PMOS transistor and the source electrode of the CMOS analog switch NMOS transistor are both connected with the output voltage end of the CMOS analog switch; the grid electrode of the CMOS analog switch NMOS transistor is connected with the grid electrode control signal, wherein the low level end of the grid control signal and the substrate of the CMOS analog switch NMOS transistor are connected with the low level end of the negative potential generation circuit, and the negative potential generation circuit is provided with a plurality of analog switch input voltage end interfaces and a plurality of analog switch output voltage end interfaces.

Description

technical field [0001] The invention relates to a CMOS analog switch technology for switching negative pressure signals, in particular to an analog switch capable of realizing multi-port over-negative pressure in a chip without power consumption. CMOS analog switch realizes negative voltage signal switching without providing negative voltage power supply, without increasing power consumption, and without additional circuits on the chip, and the negative pressure signal switching is suitable for analog circuits with multiple input and output ports and complex connection relationships. switch. Background technique [0002] At present, when the general CMOS analog switch switches the negative voltage signal, an additional negative voltage power supply is required, or a negative voltage is generated inside the chip, which is connected to the low level of the control signal of the NMOS transistor of the switch and the substrate terminal of the NMOS transistor of the switch. . I...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/687
CPCH03K17/687Y02D10/00
Inventor 邹臣张海冰张利地
Owner SG MICRO