Three-dimensional phase change memory device

Abstract

Embodiments of 3D memory devices and methods of forming the same are disclosed. In an example, a 3D memory device includes parallel lower and upper bit lines, parallel word lines, lower and upper memory cells, a lower bit line contact in contact with the lower bit line, and an upper bit line contact in contact with the upper bit line. The parallel word lines are positioned in the same plane between the lower bit line and the upper bit line. Each word line is perpendicular to the lower bit line and the upper bit line. Each lower memory cell is disposed at an intersection of a lower bit line anda corresponding word line. Each upper memory cell is disposed at an intersection of an upper bit line and a corresponding word line. Each lower or upper memory cell includes a stacked phase change memory (PCM) element, a selector, and an electrode. At least one of the lower bit line contact and the upper bit line contact is internally provided between the lower memory cell and the upper memory cell in a plan view.

Description

Background technique [0001] Embodiments of the present disclosure relate to three-dimensional (3D) memory devices and fabrication methods thereof. [0002] Planar memory cells have been shrunk to smaller sizes by improving process technology, circuit design, programming algorithms, and fabrication techniques. However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become more difficult and more expensive. Therefore, the storage density of planar memory cells approaches the upper limit. [0003] 3D memory architectures can address density limitations in planar memory cells. A 3D memory architecture includes a memory array and peripheral devices for controlling signals to and from the memory array. For example, a phase change memory (PCM) may utilize a difference between resistivities of an amorphous phase and a crystalline phase in a phase change material based on electrothermally heating and quenching the phase ch...

AI Technical Summary

Problems solved by technology

However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become more difficult and costly

Therefore, the storage density of planar memory cells approaches the upper limit

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