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Oscillator for outputting multiple duty cycle pulse signals

A technology of pulse signal and duty cycle, applied in the direction of pulse generation, pulse technology, electric pulse generation, etc., can solve the problem that the oscillator cannot be realized, and achieve the effect of avoiding the lock of the oscillator

Active Publication Date: 2021-06-11
3PEAK INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] The oscillator in the prior art can provide a clock signal with a relatively precise duty ratio, but in many applications, it is necessary to output multiple pulse signals with a precise duty ratio at the same clock frequency for maximum / minimum duty The control of ratio and other functions, which cannot be realized by conventional oscillators

Method used

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  • Oscillator for outputting multiple duty cycle pulse signals
  • Oscillator for outputting multiple duty cycle pulse signals
  • Oscillator for outputting multiple duty cycle pulse signals

Examples

Experimental program
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Embodiment 1

[0047] ginseng figure 1 , Figure 2a-2c Shown is the circuit schematic diagram of the oscillator in this embodiment, image 3 It is a timing diagram of the oscillator in this embodiment when it works normally, and it can output two pulse signals with precise duty ratio at the same clock frequency.

[0048] The oscillators in this example include:

[0049] a voltage generating unit 10, configured to output a linearly increased voltage Vcap;

[0050] Data selector 20, used to select different reference voltages Vref;

[0051] The comparator 30 is used to receive the voltage Vcap output by the linear voltage generating unit and the reference voltage Vref selected by the data selector and output the Out signal after comparison;

[0052]The oscillating unit 40 includes several flip-flops for outputting a plurality of control signals Q according to the Out signal and the clock signal;

[0053] The reset unit 50 is used to generate a reset signal Reset to reset the oscillation u...

Embodiment 2

[0065] The oscillator in embodiment 1 has the risk of being locked up, such as Figure 4 As shown, when two adjacent reference voltages are relatively close so that the graph Δt is less than the flipping speed of the comparator in the oscillator, the output of the comparator cannot generate two rising edge pulses when crossing the two reference voltages but can only generate A rising edge pulse will cause a logic error later, the oscillator will be locked all the time, and the clock signal can no longer be output.

[0066] ginseng Figure 5 As shown, in order to prevent the risk of the oscillator being locked due to the above-mentioned various factors, a self-loop anti-lock unit 60 is added on the basis of Embodiment 1. When the output of the comparator cannot output the correct number of rising edges , the self-circulation anti-lock unit will intervene to make up for the missing rising edge, thereby preventing the oscillator from being locked.

[0067] ginseng Figure 5 , ...

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Abstract

The present invention discloses an oscillator for outputting a plurality of duty cycle pulse signals, the oscillator includes: a voltage generating unit, used for outputting a linearly increased voltage Vcap; a data selector, used for selecting different reference The voltage is used as the reference voltage Vref; the comparator is used to receive the voltage Vcap output by the linear voltage generating unit and the reference voltage Vref selected by the data selector and output the Out signal after comparison; the oscillation unit includes several flip-flops for timely The clock signal outputs a plurality of control signals Q; the reset unit is used to generate a reset signal Reset to reset the oscillation unit and the data selector, and to generate a reset signal Reset_cap to reset the voltage generation unit; the output unit is used to reset the voltage generation unit according to the reset signal Reset and The control signal Q generates a plurality of duty ratio pulse signals clk_duty. The oscillator of the present invention can output multiple pulse signals with precise duty ratios at the same clock frequency.

Description

technical field [0001] The invention belongs to the technical field of oscillators, in particular to an oscillator for outputting a plurality of duty cycle pulse signals. Background technique [0002] An oscillator is a common circuit in an analog integrated circuit, and its function is to generate a system clock. One of the important indicators is the duty cycle (Duty Cycle, DC for short). The duty cycle is defined as the ratio of the high level time to the clock cycle time in a clock cycle. [0003] The oscillator in the prior art can provide a clock signal with a relatively precise duty ratio, but in many applications, it is necessary to output multiple pulse signals with a precise duty ratio at the same clock frequency for maximum / minimum duty The control of the ratio and other functions cannot be realized by conventional oscillators. [0004] Therefore, in view of the above technical problems, it is necessary to provide an oscillator for outputting pulse signals with ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K3/017
CPCH03K3/017
Inventor 李海波冯翰雪李冬超
Owner 3PEAK INC