Maximum fault-tolerant design method in large digital array system driven by data stream
A digital array and fault-tolerant design technology, applied in the field of digital array radar, can solve the problems of large number of cables and difficult wiring of antenna cage, and achieve the effect of simplifying the debugging process
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[0026] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:
[0027] The present invention mainly comprises following content and steps:
[0028] a) Build a distributed sampling platform, place the board including multi-channel sampling chips and FPGA chips on the front end of the radar antenna, corresponding to the receiving channel of the antenna front-end array element, and sample each channel to form a distributed sampling structure.
[0029] b) Since large digital arrays usually have a huge amount of computation, it is impossible to directly aggregate the data of all the above sampling channels into one processing board to complete DBF and related processing. At this time, multi-processing boards need to work together. Each processing board receives a certain amount of sampling data and outputs the processing results at the same time. That is, the data stream after sampling processing needs to be summarized among multi...
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