Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

32 results about "Error-tolerant design" patented technology

An error-tolerant design (also: human-error-tolerant design) is one that does not unduly penalize user or human errors. It is the human equivalent of fault tolerant design that allows equipment to continue functioning in the presence of hardware faults, such as a "limp-in" mode for an automobile electronics unit that would be employed if something like the oxygen sensor failed.

Gas concentration prediction method based on irregular sampling data multi-scale feature fusion

The invention relates to a gas concentration prediction method based on irregular sampling data multi-scale feature fusion, and belongs to the technical field of coal mine gas concentration prediction. The method comprises the following steps: S1, data preparation: carrying out data sequence division according to shift time set by a coal mine; s2, continuous time coding and feature fusion: performing potential space mapping on the divided sequence by using Shenchang differential; dividing multiple time windows, and performing multi-scale data feature extraction and fusion; s3, shift self-adaptive design: adopting a hybrid expert structure and a gating network to perform self-adaptive processing on coal mine shift changes, and outputting weighting and features by an expert layer; s4, failure fault-tolerant design: performing failure fault-tolerant processing, and compensating a data missing problem caused by common sensor abnormality to obtain reconstruction features; and S5, splicing the expert layer output features with the reconstruction features, inputting the spliced features into a prediction network, and predicting the gas concentration at the next moment. The accuracy of toxic and harmful gas can be remarkably improved.
Owner:CHINA COAL TECH & ENG GRP CHONGQING RES INST CO LTD

Road berth charging and control system and method for realizing multi-level fault tolerance

The invention discloses a road berth charging and control system for realizing multi-level fault tolerance and a method thereof, and belongs to the technical field of intelligent traffic systems and Internet of Things. The system adopts an edge computing and distributed sensing collaborative architecture, and is composed of an edge controller (ECU) and a sensing and control unit (SCU) deployed in a berth. High availability of the system is ensured through fault-tolerant design of three core dimensions: firstly, perception layer fault tolerance dynamically adjusts data fusion weights of geomagnetism, millimeter wave radar and visual AI according to real-time environment data such as rainfall and electromagnetic interference by integrating an environment perception sub-module; secondly, network layer fault tolerance utilizes an immutable transaction log and a Saga distributed transaction compensation mechanism to realize local charging and digital RMB double offline payment when cloud connection is interrupted, and data consistency is ensured after network recovery; and finally, a hardware layer establishes a neighborhood cooperation protocol based on a signature agent command through fault tolerance, and a healthy node is allowed to act as an agent fault node through safety verification to execute an unlocking instruction. According to the invention, the problems of environmental interference, network interruption, single-point hardware failure and the like in unattended parking management are effectively solved, and the robustness and financial security of the system are remarkably improved.
Owner:JIANGSU RUOLIN LINK TECH CO LTD

Neural network accelerator circuit fault detection and repair method and system for radiation environment application

PendingCN120652250AElectronic circuit testingPhysical realisationNetwork modelError-tolerant design
The invention discloses a radiation environment application-oriented neural network accelerator circuit fault detection and repair method and system. The method comprises the steps of determining a key path list of a neural network accelerator circuit by introducing a fault site; performing fault-tolerant design on the critical path list, generating a fault-tolerant CNN accelerator netlist, verifying a circuit operation result during operation, detecting and marking a difference result, and generating a fault flag bit; and according to the fault flag bit, the soft fault is solved through the repair site, and if the soft fault cannot be repaired, the network model is reloaded, and the affected local resources are dynamically reconstructed or reset to complete self-repair. The method has the remarkable advantages of improving reliability, automatically detecting faults, efficiently repairing the faults, reducing maintenance cost, improving system adaptability and the like, and powerful technical guarantee is provided for application of the neural network accelerator in the extreme environment.
Owner:GUANGZHOU UNIVERSITY

Heterogeneous Internet of Things topology key node identification method in combination with mutation theory

The invention discloses a heterogeneous Internet of Things topology key node identification method in combination with a mutation theory, and belongs to the field of computers and information, and the method comprises the steps: firstly constructing an initial topology of a heterogeneous Internet of Things, generating a topology set through random disturbance, and calculating performance indexes such as robustness, redundancy, communication efficiency and a global clustering coefficient; then normalizing the indexes by using a mutation series method, evaluating the correlation between the indexes based on a Pearson's correlation coefficient, and obtaining a network performance mutation value through layer-by-layer fusion; simulating a deliberate attack process, establishing a corresponding relationship between a node deletion sequence and performance evolution, and fitting to obtain a performance evolution function; and finally, establishing a cuspidal point mutation model, and identifying critical nodes causing network performance mutation by analyzing the equilibrium state, the singular set and the bifurcation set of the model, thereby breaking through the limitation of traditional static network indexes, being capable of accurately capturing the mutation behavior of the network performance, being high in objectivity, and providing a theoretical basis for topological optimization and fault-tolerant design of the Internet of Things.
Owner:NORTHEASTERN UNIV CHINA

High-safety double-anchoring cabin control system

The invention belongs to the technical field of aircraft design, and discloses a high-safety double-anchoring cabin control system which comprises a left control system and a right control system, the left control system is provided with a left steering wheel, a left damper, a left longitudinal module mechanical assembly and a left longitudinal load mechanism, and the right control system is provided with a right steering wheel. A left steering wheel is connected with a left longitudinal module mechanical assembly and a left damper through a set of rocker arm structures, the left longitudinal module mechanical assembly is connected with a left longitudinal load mechanism and a right control system through one rocker arm assembly, and a right longitudinal module mechanical assembly is connected with a right longitudinal load mechanism through the other rocker arm assembly. A load pull rod is further connected between the left longitudinal load mechanism and the right longitudinal load mechanism through a rocker arm in a switching mode, the load pull rod is further connected with a balancing motor, and the load pull rod is axially connected with an anchoring pull rod. According to the invention, the fault-tolerant design of the cabin control system is innovatively realized through the designed double-anchor-point redundancy architecture.
Owner:AVIC GENERAL HUANAN AIRCRAFT IND CO LTD

Method for reducing steel plate thermal jet printing paint consumption based on character optimization

The invention discloses a method for reducing steel plate thermal jet printing paint consumption based on character optimization, and relates to the technical field of jet printing in the steel and iron manufacturing industry, and the method comprises the following specific steps: S1, data acquisition and preprocessing: acquiring multiple data of a steel plate and dividing surface roughness grades; s2, basic code generation and fault-tolerant design: simplifying an original code and adding a verification and redundancy mechanism to generate a new code; s3, dynamic code adjustment, wherein the code length and character arrangement are adjusted according to the rolling speed and the steel plate temperature; s4, character shape adaptation optimization: character strokes, corners and blank areas are adapted according to the roughness of the steel plate; s5, jet printing execution and quality verification: optimizing a jet printing path after character clustering, and determining whether to respray according to a respray probability; according to the invention, through simplified coding, dynamic adjustment and form adaptation optimization, paint consumption is reduced; and meanwhile, fault-tolerant design and environmental perception are adopted, so that the problems of fuzzy jet printing, equipment shutdown and the like of a traditional method are solved, and the jet printing stability and definition are improved.
Owner:NANJING IRON & STEEL CO LTD

A quick-change structure for drone batteries

The present invention relates to a quick-change battery structure for unmanned aerial vehicles. Batteries are installed by sliding in a battery installation space via a guide rail. The upper end of a battery compartment frame is hingedly connected to a hatch cover via a hatch hinge. A locking handle is rotatably mounted on the front end of the battery compartment. Lock holes are provided on both sides of the battery compartment frame. Hatch cover spring lock hooks are provided on the hatch cover corresponding to the lock holes. When the hatch cover and the fuselage are closed, the hatch cover spring lock hooks engage and lock with the lock holes. The present invention has a compact structure. When the battery compartment cover is closed, the hatch cover hinge is hidden inside the fuselage, making the appearance neater and not affecting the aerodynamic shape. The invention has a fault-tolerant design. Even if the locking handle is not fully in place, the locking handle is pressed against the battery compartment cover a second time during the closing process to reset it, thereby ensuring the reliability of battery locking. The installation and replacement of the battery are quick and convenient, and the safety is high.
Owner:TIANJIN PEGASUS ROBOT TECH CO LTD

A method and system for controlling TSN time synchronization message output

The present invention discloses a method and system for controlling the output of TSN time synchronization messages, which are applied to a message output control system. The message output control system includes a first output buffer module for transmitting and receiving time synchronization messages and a second output buffer module for transmitting and receiving other Ethernet messages. The first output buffer module and the second output buffer module are both connected to an output selection module. The method includes: when the output selection module is idle, detecting messages waiting to be output in the first output buffer module and the second output buffer module; if the first output buffer module has a time synchronization message waiting to be output and the second output buffer module has no other Ethernet messages with a higher priority than the time synchronization message waiting to be output, then the time synchronization message is obtained from the first output buffer module, outputted, and then returned to an idle state; otherwise, the output selection module obtains other Ethernet messages from the second output buffer module, outputs them, and then returns to an idle state. The present invention ensures flexibility when meeting fault-tolerant design requirements.
Owner:NAT UNIV OF DEFENSE TECH

Automatic Fault Recovery Method for Internet of Things Communication System Based on Fault Tolerant Design

The present invention discloses an automatic fault recovery method for an Internet of Things communication system based on fault-tolerant design, belonging to the technical field of the Internet of Things. Specifically, it includes: constructing a multi-source data monitoring network by deploying multiple types of building risk monitors to collect building status data in real time, and performing data fusion using Internet of Things technology and the weighted average method; combining a preset threshold and an anomaly detection algorithm, the system can automatically detect anomalies and risk situations in the building; based on the fault features extracted from the data, using a reinforcement learning algorithm to construct a fault prediction model; after fault isolation, the system performs adaptive automatic repair and generates repair suggestions; records the fault events and their processing procedures, generates a fault report and improvement suggestions through big data analysis, improving the accuracy and timeliness of fault detection.
Owner:SHANGHAI LINGZE INFORMATION TECHNOLOGY CO LTD

New energy maintenance guidance system fusing digital twinning and AR interaction

PendingCN121961527ASolving registration deviation issuesimprove accuracyData processing applicationsData streamNew energy
The invention belongs to the technical field of new energy electric power, and discloses a new energy maintenance guidance system fusing digital twinning and AR interaction, a field layer multi-mode sensing unit realizes accurate acquisition of equipment multi-source state data, and provides reliable data support for maintenance guidance; the data preprocessing and model caching functions of the edge layer are matched with the fault-tolerant design of the weak network to ensure that the maintenance work is continuous and uninterrupted in the weak network environment. The terminal layer AR interaction realizes the high-precision spatial registration of the virtual model and the physical equipment, solves the problem of deviation of traditional auxiliary information and physical registration, and avoids the risk of non-standard operation through action and logic verification. A plurality of modules integrated on the cloud platform realize twin modeling, state diagnosis and process management and control, high-precision combination of maintenance information and real objects is realized by combining hierarchical data circulation, controllability and continuity of operation logic are guaranteed, and accuracy, safety and efficiency of maintenance operation are greatly improved.
Owner:XIAN THERMAL POWER RES INST CO LTD +1

A fast fault-tolerant method for container orchestration scheduling

The application belongs to the technical field of computer system software, and particularly relates to a quick fault-tolerant method for container orchestration scheduling. The application adopts a container deployment mode designed for quick fault tolerance, plans the number of normal operation Pod replicas and the number of backup container replicas and resource requirements in advance, creates and starts the Pod required for normal operation, allocates resources on the available idle nodes according to the number of backup container replicas, and pre-creates the container application. When a node fails, the available backup replica is directly selected and the container is started without the process of scheduling and resource allocation, and a new backup replica is dynamically generated. The application reduces the conventional second-level container fault discovery and fault tolerance to the millisecond level, and meets the quick fault-tolerant requirement of critical business.
Owner:XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA

Dual hand button synchronous interlock safety control module and control method

PendingCN122652928AHemt circuitsInternal feedback
The application relates to the technical field of industrial safety control, and discloses a double-hand button synchronous interlocking safety control module and a control method. The module comprises two input channels, a cross fault detection circuit, a synchronism detection circuit, a redundant output unit and an internal feedback monitoring circuit. The cross fault detection circuit continuously monitors the electrical isolation state between the channels during operation, and disconnects the output when an abnormality is found. The synchronism detection circuit measures the time difference when the two input signals become valid, and only allows the output when the time difference is not greater than a preset synchronization time window. The redundant output unit is composed of at least two series-connected forced direction switching elements, and cooperates with the feedback monitoring to ensure that the safety circuit can still be cut off under single-point fault. The application improves the safety and reliability and the response speed through real-time channel isolation monitoring, pure hardware synchronization judgment and redundant output fault-tolerant design, meets the requirements of high safety integrity level, and is suitable for safety application scenarios of various double-hand button control.
Owner:SHENZHEN YIPUXING TECH CO LTD

Emergency trip method and system for steam turbine test switching

The invention discloses an emergency trip method and system for steam turbine test switching, and relates to the technical field of power equipment safety control, and the method comprises the steps: building a redundant solenoid valve control loop, and initializing a switching logic structure; based on the hanging gate logic structure, a test hanging gate control instruction is sent out, and the health state of a hanging gate loop is monitored in real time; and according to the healthy state of the hanging gate loop, emergency trip action is executed, and safe shutdown of the steam turbine is completed. According to the method, the structural redundancy and fault tolerance design of the switching execution path is realized, the risk of interruption failure caused by a single-point fault of the electromagnetic valve is reduced from the source, and the stability and the structural reliability of a switching control system are remarkably improved; according to the method, a hanging gate loop health state evaluation mechanism is established, the accuracy of judgment before interruption is effectively improved, dynamic matching of hanging gate control logic and an execution mechanism is achieved, and finally the quick response capacity and the safe shutdown effect of a steam turbine under sudden abnormity or safety requirements are improved.
Owner:HUANENG GANSU ENERGY DEVELOPMENT CO LTD 803 BRANCH

An RC topology filter circuit with fault-tolerant design and its optimization method

The present invention discloses an RC topology filtering circuit with fault-tolerant design and its optimization method; the RC topology filtering circuit includes a topology circuit and a load resistor. The topology circuit includes a plurality of topology units arranged in an n×n array. Each of the topology units includes a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a capacitor C1, a capacitor C2, a capacitor C3, and a capacitor C4. By providing the capacitors C3 and C4 in the topology unit, when the remaining resistors and capacitors fail, the capacitors C3 and C4 can provide backup paths, thereby greatly improving the fault-tolerant ability of the RC topology filtering circuit and extending the service life. In addition, the topology unit designed by the present invention can be quickly spliced into topology networks with different numbers of rows and columns, so as to be used in filtering scenarios with different fault-tolerant requirements, improving the flexibility of the topology filtering circuit.
Owner:HANGZHOU DIANZI UNIV +1

High-flexibility self-adaptive intelligent disordered sorting robot system

The invention discloses a high-flexibility self-adaptive intelligent disordered sorting robot system, which relates to the technical field of intelligent manufacturing and industrial automation, and comprises a visual inspection and positioning module, a dynamic trajectory planning module, an intelligent grabbing and flexible control module, a digital twin quality tracing platform and a system stability and fault-tolerant design module, through self-adaptive production line collaboration, multi-mode sorting compatibility, part feature autonomous learning and full-link quality tracing, the sorting efficiency and the production efficiency can be effectively improved, the unit cost is reduced, small-batch mixed line production is supported, the flexible production capacity of equipment is greatly improved, and the product quality is improved. By means of the technical scheme, enterprises can better cope with diversified product requirements, the market competitiveness is enhanced, meanwhile, the new material introduction adaptation time is shortened, the rapid remodeling capacity of equipment is remarkably improved, and when the enterprises face the rapidly-changed market requirements, production plans can be adjusted more rapidly, the downtime is shortened, and the equipment utilization rate is increased.
Owner:ZHEJIANG XITUMENG DIGITAL TECH CO LTD

Fault-tolerant quantum architecture design method and device, storage medium and electronic equipment

The application discloses a fault-tolerant quantum architecture design method, device, storage medium and electronic equipment, wherein the fault-tolerant quantum architecture design method comprises the following steps: obtaining hardware configuration parameters of a target quantum computing architecture, and constructing a fault tree model based on the hardware configuration parameters; performing vulnerability evaluation on the fault tree model, generating a vulnerability quantification index, and determining a candidate component set requiring deployment of a resilience mechanism according to the vulnerability quantification index; configuring a corresponding resilience strategy for each component in the candidate component set, and generating a graceful degradation planning table based on the resilience strategy; inputting the fault tree model, the resilience strategy and the graceful degradation planning table into a formal verification engine to output a reliability certificate; and generating an authenticated resilience architecture netlist through a hardware description language according to the reliability certificate. The application can solve the technical problems that the quantum computing system lacks systematic fault-tolerant design, the fault response capability is insufficient, and the reliability index cannot be verified in the prior art.
Owner:SHENZHEN CHIPBEST MICROELECTRONICS CO LTD

Silicon substrate interconnection yield prediction and optimization method

The invention relates to a silicon substrate interconnection yield prediction and optimization method. The method comprises the steps of obtaining position data and yield actual measurement data of a plurality of interconnection points to be actually measured in a target wafer-level substrate, and determining a target yield prediction model based on the position data and the yield actual measurement data of the plurality of interconnection points to be actually measured, the target yield prediction model comprises a mapping relation between the position of the interconnection point on the target wafer-level substrate and the yield, predicting the yield of the interconnection point to be predicted on the target wafer-level substrate based on the target yield prediction model, and obtaining a yield prediction result of the interconnection point to be predicted. By adopting the method, the yield data can be obtained according to the actual interconnection structure design experiment test, the yield data is adopted to guide the generation of the prediction model, the prediction model is used for evaluating the yield of the current wafer-level system architecture, and then the architecture modification and fault-tolerant design are fed back and guided, so that a closed-loop and efficient optimization system is formed, and the system reliability is improved. And production of the wafer-level large-size interconnection substrate design is guaranteed.
Owner:SEMICON TECH INNOVATION CENT(BEIJING) CORP +1

A dynamic vulnerability-aware adaptive fault-tolerance method and system

The present invention discloses a dynamic vulnerability-aware adaptive fault-tolerance method and system. The method comprises: constructing a first computational graph based on the layers, input data, and data flow of a deep learning neural network, and encoding the nodes and edges of the first computational graph with feature vectors; annotating some of the feature-vector-encoded nodes with vulnerability labels to obtain a training sample set, and using the unlabeled nodes as a test set; training a GNN model based on the training sample set using a loss function to obtain a vulnerability predictor model; converting the current deep learning neural network into a second computational graph, and inputting the second computational graph into the vulnerability predictor model to classify or label each node in the second computational graph as a vulnerable node, and matching corresponding fault-tolerance strategies to nodes of different vulnerability categories. This adaptive fault-tolerance method can dynamically perceive the vulnerability of each layer of the neural network and the input data, and utilize the vulnerability differences between nodes to achieve a lightweight fault-tolerance design.
Owner:HANGZHOU INST FOR ADVANCED STUDY UCAS

Anti-interference capability test and quantitative analysis method and system of pulse neural network

This application discloses a method for testing and quantifying the anti-interference capability of a spiking neural network, belonging to the field of neuromorphic computing and artificial intelligence. The method includes: conducting multiple independent test experiments on a spiking neural network model to be deployed on a target hardware platform in a simulation environment to obtain a set of technical state signals corresponding to each test experiment; performing multi-dimensional quantitative analysis based on the first and second sets of technical state signals obtained from each test experiment to determine multiple performance indicators used to characterize the anti-interference capability of the spiking neural network model; normalizing and fusing the multiple performance indicators to generate a network anti-interference capability index; and using the network anti-interference capability index as a reliability pre-evaluation parameter of the spiking neural network model on the target hardware platform to guide the fault-tolerant design of the target hardware platform or to optimize the robustness of the spiking neural network model.
Owner:HEBEI UNIV OF TECH

Method and power conversion system for fault-tolerant operation of an electric propulsion of an aircraft

ActiveCN113572380BControl theoryDC-BUS
Methods and power conversion systems related to fault-tolerant operation for aircraft electric propulsion. The fault-tolerant system continues to operate in the event of a component failure, i.e., one or more faults within a component. The fault-tolerant design enables the system to continue its intended operation, possibly at a reduced level, when some parts of the system fail, rather than completely failing. When a turn-to-turn fault in an AC motor is detected, the motor controller shorts together three top switches or three bottom switches of the inverter, effectively shorting the associated stator winding, to divert the fault current from the motor winding to the motor controller, if cooling is available. Also, when a fault in the motor controller or at the input to the motor controller is detected, the motor controller cuts power to the motor by issuing a command to open the upstream contactor from the high voltage DC bus input.
Owner:THE BOEING CO

Satellite-borne high-precision photoelectric encoder measurement result high fault-tolerance design method and system

The application provides a kind of high-precision photoelectric encoder measurement result high fault-tolerant design method and system on satellite, comprising: by radial transceiving light path double-channel design, obtain two-way absolute angle data and two-way incremental data, four-way measurement data output angle data according to predetermined judgment rule, judgment rule is suitable for single point failure to output correct data, when multiple faults occur, according to the specific situation analysis, the judgment rule can be avoided to avoid the fault state and change to obtain correct angle data output, realize automatic fault-tolerant design.
Owner:SHANGHAI SATELLITE ENG INST

Heterogeneous internet of things topology key node identification method combined with mutation theory

The application discloses a method for identifying key nodes of a heterogeneous Internet of Things (IoT) topology based on mutation theory, and belongs to the field of computers and information. First, an initial topology of the heterogeneous IoT is constructed, a topology set is generated by random disturbance, and performance indexes such as robustness, redundancy, communication efficiency and global clustering coefficient are calculated. Then, the indexes are normalized by using a mutation series method, the correlation between the indexes is evaluated based on a Pearson correlation coefficient, and a network performance mutation value is obtained by layer-by-layer fusion. Next, a deliberate attack process is simulated, a corresponding relationship between a node deletion sequence and performance evolution is established, and a performance evolution function is fitted. Finally, a cusp mutation model is established, critical nodes causing network performance mutation are identified by analyzing the equilibrium state, singular set and bifurcation set of the model, and the application breaks through the limitations of traditional static network indexes, can accurately capture the mutation behavior of network performance, is objective, and provides a theoretical basis for topology optimization and fault-tolerant design of the IoT.
Owner:NORTHEASTERN UNIV CHINA

Steering wheel steering column stowage system and control method and device thereof, storage medium

The application discloses a steering wheel steering column storage system and a control method and device thereof and a storage medium, and the method comprises the following steps: receiving and responding to a control instruction; determining the position of the steering column relative to the steering wheel; and controlling the steering column according to the position of the steering column relative to the steering wheel. The control method can make the driver more convenient and comfortable when getting on or off the vehicle, and will not touch the surrounding parts when the steering column is unfolded or stored. Meanwhile, the fault-tolerant design device for realizing the storage and unfolding of the steering column in the high-order intelligent driving scene is also provided.
Owner:ZHEJIANG GEELY HLDG GRP CO LTD +1

Ecc fault-tolerant structure covering full communication path and memory fault-tolerant design method

This invention discloses an ECC fault-tolerant structure and memory fault-tolerant design method covering the entire communication path, relating to the field of on-chip memory technology. It addresses the technical problem that existing on-chip memory EDAC technology's protection scope is limited to the on-chip memory cell itself, and introduces additional errors during data transmission, making it difficult to guarantee data integrity. The ECC fault-tolerant structure covering the entire communication path includes a host module, an interconnect bus, and storage components. The host module is configured with an ECC codec. The host module is used to implement access control of the storage components. The interconnect bus is used to implement access routing between the host module and the storage components and establish a connection between them. The host module initiates a data write access, encodes the pre-written data using ECC, and then initiates a write access to the storage component. The interconnect bus routes the access to the corresponding storage component based on the access address.
Owner:NORTHWESTERN POLYTECHNICAL UNIV

Hydropower station governor water head optimization system and optimization method thereof

The invention relates to the technical field of water conservancy and hydropower engineering unit control, and particularly discloses a hydropower station governor water head optimization system and method. The system comprises a public LCU, a water head monitoring device, a unit LCU and a speed regulator, the public LCU collects upstream and downstream water level signals, the water head monitoring device processes the water level signals and then outputs standard analog quantity, and the unit LCU mutually takes the water level signals through a monitoring system network, obtains real-time water head signals through operation and issues the real-time water head signals to the speed regulator; the speed regulator carries out fault judgment, data validity screening and undisturbed switching control on the real-time water head signals, and the processed water head signals are applied to open limit adjustment and paddle joint control under the starting-up no-load and grid-connected working conditions of a unit. Through software acquisition and fault-tolerant design, accurate acquisition and stable control of water head signals are realized, and the operation reliability and safety of a unit are improved.
Owner:HUBEI PORT YAKOU SHIPPING HUB CO LTD

Verification method, system and equipment for fault injection of FPGA (Field Programmable Gate Array) and medium

The invention provides a verification method, system and device for fault injection of an FPGA and a medium, the FPGA is applied to a nuclear power station system, and the verification method comprises the following steps: obtaining fault injection information and a target node in the FPGA; based on the fault injection information, performing fault injection on the target node in a preset simulation tool to obtain a simulation result; and based on the simulation result, verifying the FPGA to obtain a verification result. According to the method and the device, the fault injection is performed on the target node in the FPGA in the preset simulation tool through the fault injection information to obtain the simulation result, so that the verification result of the FPGA is obtained, the fault-tolerant capability of the FPGA in high-security applications such as a nuclear power station is efficiently and accurately verified, the method and the device can be flexibly used in different application scenes, and the reliability of the FPGA is improved. And the stability and the anti-interference performance of the design are tested in the preset simulation tool, so that the performance and the stability of the fault-tolerant design of the FPGA can be ensured, and the reliability requirement of a nuclear power station system is met.
Owner:STATE NUCLEAR POWER AUTOMATION SYST ENGCO

EHD printing integrally-formed high-precision FPC antenna and preparation method thereof

The invention discloses an EHD printing integrally-formed high-precision FPC antenna and a preparation method, and belongs to the technical field of FPC antennae. The EHD printing integrally-formed high-precision FPC antenna comprises a substrate and a Koch snowflake fractal radiation patch formed on the substrate; a metal line of the Koch snowflake fractal radiation patch has an optimized nominal width Wopt, and the Wopt is a parameter determined by modeling a line width manufacturing error of EHD printing into a random variable in a range of + / -15 [mu] m and carrying out collaborative fault-tolerant design on an antenna structure by taking the resonant frequency offset of the antenna not greater than 1.5% as an optimization target; the radiation patch is printed by conductive ink and is formed after synchronous ultraviolet precuring and stepped thermocuring, and the conductive ink contains supported Ag2O-MXene composite powder; through deep collaboration and optimization of a structure fault-tolerant design, a special functional material and a precision manufacturing process, the problem of mismatch from a high-performance design model to high-fidelity physical antenna manufacturing is solved, and particularly, a reliable integrated solution is provided for flexible electronic manufacturing of complex fine patterns.
Owner:NANO TOP ELECTRONICS TECH

Modularized hyper-redundant continuum robot for deep cavity operation and control method

The invention discloses a modularized hyper-redundant continuum robot for deep cavity operation and a control method, and belongs to the technical field of specialized robots. The robot comprises a modular continuum robot mechanical body, a hyper-redundant continuum robot module, a driving transmission module, a power conversion module, a power supply, a control system module and a mobile chassis. The modular continuum robot mechanical body is located on the movable chassis. The hyper-redundant continuum robot module realizes mechanical positioning or signal interconnection through a composite interface at the front end of the modularized continuum robot mechanical body; the driving transmission modules are arranged in the modular continuum robot mechanical body in groups in the axial direction. According to the robot, on-demand combination and in-place replacement of operation units are achieved through structural control decoupling, redundancy and fault-tolerant design, the long, thin, smooth and high-degree-of-freedom characteristics are considered, and therefore the accessibility and stability in the deep cavity environment are improved, and the maintenance difficulty and the shutdown cost are remarkably reduced.
Owner:FUYANG NORMAL UNIVERSITY