Unlock instant, AI-driven research and patent intelligence for your innovation.

Configurable dual-mode redundancy structure of multi-core processor

A multi-core processor, dual-mode redundancy technology, applied in electrical digital data processing, hardware redundancy for data error detection, instruments, etc., can solve the problem of reducing the soft error tolerance and overall performance of multi-core processors , to achieve scalability, ensure consistency, and reduce the need for memory access

Active Publication Date: 2020-05-22
BEIJING MXTRONICS CORP +1
View PDF11 Cites 2 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Reduces soft error tolerance and overall performance of multi-core processors due to excessive software involvement required

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Configurable dual-mode redundancy structure of multi-core processor
  • Configurable dual-mode redundancy structure of multi-core processor
  • Configurable dual-mode redundancy structure of multi-core processor

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] A multi-core processor of the present invention can configure a dual-mode redundant structure, such as figure 1 As shown, it includes: a microprocessor 101, a first interface unit 141, a first routing unit 151, a second interface unit 161, a second routing unit 171, and an on-chip shared storage unit 181;

[0035] On-chip shared storage unit 181 is respectively connected with a plurality of first interface units 141, and each first interface unit 141 is respectively connected with corresponding first routing unit 151 and microprocessor 101; each microprocessor 101 is connected with second an interface unit 161, a second routing unit 171;

[0036]Microprocessor 101 is used to execute instructions and process data, including: controller, arithmetic logic unit ALU, register file, redundant control register 121, register file redundant control unit 131; controller is used to send control information to other components; arithmetic The logic unit ALU is used to perform vari...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a configurable dual-mode redundancy structure of a multi-core processor. The configurable dual-mode redundancy structure comprises a microprocessor, a first interface unit, a first routing unit, a second interface unit, a second routing unit and an on-chip shared storage unit. The two processors in the dual-mode redundancy mode automatically copy input data, automatically compare output data to find errors, and automatically compare the data in a register file to eliminate the errors through an automatic data recovery structure in the register file. According to the invention, any two processors in the multi-core processor can be configured to be in a dual-mode redundancy mode.

Description

technical field [0001] The invention relates to a configurable dual-mode redundant structure of a multi-core processor, which belongs to the technical field of multi-core processors. Background technique [0002] At present, the methods for improving the soft error capability of multi-core processors in the architecture mainly include: calculating the shifted operands through redundant pipelines, detecting transient and permanent errors in the ALU; The function mapping relationship between the input operand and the output result detects errors in the ALU; the watchdog (Watchdog) technology is used to monitor the address and data bus; the ECC check code technology is used for on-chip memory, Cache, Units such as the register file perform soft error detection and correction; the soft error detection execution model CRT detects soft errors by comparing the output of redundant threads. [0003] At present, the existing methods need to increase special hardware resources, and th...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): G06F11/16
CPCG06F11/1608G06F11/1641Y02D10/00
Inventor 宋立国于立新彭和平庄伟覃辉亓洪亮王兴友苏天红飞海东张世远秦智勇杨雪任艳慧刘亚丽
Owner BEIJING MXTRONICS CORP