Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Manufacturing method of integrated structure, manufacturing process of semiconductor device and integrated structure

A manufacturing process and manufacturing method technology, which can be applied to semiconductor devices, electrical solid devices, electrical components, etc., and can solve problems such as poor control gate height uniformity.

Pending Publication Date: 2020-07-14
YANGTZE MEMORY TECH CO LTD
View PDF4 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The main purpose of this application is to provide a manufacturing method of an integrated structure, a manufacturing process of a semiconductor device, an integrated structure and a semiconductor device, so as to solve the problem of poor height uniformity of the selection control gate formed by the SEG process in the prior art

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Manufacturing method of integrated structure, manufacturing process of semiconductor device and integrated structure
  • Manufacturing method of integrated structure, manufacturing process of semiconductor device and integrated structure
  • Manufacturing method of integrated structure, manufacturing process of semiconductor device and integrated structure

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0040] It should be pointed out that the following detailed description is exemplary and intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0041] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural, and it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, they mean There are features, steps, operations, means, components and / or combinations thereof.

[0042] It will be understood that when an element such as a layer, film, region, or substrate is referred to as ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a manufacturing method of an integrated structure, a manufacturing process of a semiconductor device, the integrated structure and the semiconductor device. The method comprisesthe following steps: providing a preparation substrate; and etching the preparation substrate by adopting a metal-assisted chemical etching process to form an integrated structure which comprises a substrate and a plurality of spaced strip-shaped parts positioned on the substrate. The strip-shaped parts formed by the method are good in height uniformity, so good performance of the devices is guaranteed. For example, the method can be applied to the 3D NAND, the base is taken as a substrate, and the strip-shaped part is a silicon epitaxial layer formed in the prior art, i.e., a control gate; compared with a control gate formed by adopting a selective epitaxy technology in the prior art, the control gate is better in height uniformity; moreover, compared with the selective epitaxy technology, the method enables the stress change generated by the device to be relatively small, and further ensures the performance of the device to be better.

Description

technical field [0001] The present application relates to the field of semiconductors, and in particular, relates to a manufacturing method of an integrated structure, a manufacturing process of a semiconductor device, an integrated structure and a semiconductor device. Background technique [0002] In recent years, the development of flash memory (Flash Memory) has been particularly rapid. The main feature of flash memory is that it can keep stored information for a long time without power on. Therefore, it has been widely used in many fields such as microcomputer and automatic control. [0003] In the prior art, in the 3D NAND process, the stacked structure is usually deposited on the substrate first, and then etched to form a channel, and a silicon epitaxial layer is formed in the channel through SEG, that is, the selection control gate. The height uniformity of multiple selection control gates is poor, which increases the difficulty of the subsequent process and easily ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/1157H01L27/11582H10B43/35H10B43/27
CPCH10B43/35H10B43/27
Inventor 韩凯张璐吴智鹏杨川
Owner YANGTZE MEMORY TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com