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Field plate preparation method

A field plate, wet etching technology, used in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problems of precise control, difficult gate oxide thickness, poor device stability, etc., to achieve increased stability. Effect

Active Publication Date: 2022-06-07
HUA HONG SEMICON WUXI LTD
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  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] The present application provides a method for preparing a field plate, which can solve the problem of poor stability of the device due to the difficulty in accurately controlling the thickness of the gate oxide layer in the method for preparing the field plate provided in the related art

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Embodiment Construction

[0034] The technical solutions in the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0035] In the description of this application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the indicated device or element must have a ...

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Abstract

The present application discloses a method for preparing a field plate, comprising: forming a gate oxide layer on a substrate; forming a nitride layer on the surface of the gate oxide layer; forming a first dielectric layer on the surface of the nitride layer, and forming a first dielectric layer on the first dielectric layer A second dielectric layer is formed on the surface of the layer; the second dielectric layer in the target area and the first dielectric layer at a predetermined depth are removed by a dry etching process, and the target area is the area corresponding to the field plate; the target area is removed by a wet etching process The remaining first dielectric layer and nitride layer, the remaining second dielectric layer, and the remaining gate oxide layer in the target region form the field plate. In the present application, after the gate oxide layer is formed on the substrate, a nitride layer is formed on the surface of the gate oxide layer, and the nitride layer can be used as an etch barrier layer of the gate oxide layer in the subsequent wet etching process, so that After the wet etching process, a field plate with a stable thickness is obtained, thereby increasing the stability of the device.

Description

technical field [0001] The present application relates to the technical field of semiconductor manufacturing, and in particular, to a method for preparing a field plate. Background technique [0002] In the related art, a power semiconductor device (hereinafter referred to as a "power device"), especially a field plate of a high voltage (high voltage, HV) power device, usually forms a dielectric layer on the gate oxide layer, and then passes through a photolithography process. After defining the exit plate region, the field plate is formed by dry etching and wet etching. [0003] In the related art, the morphology of the formed field plate depends on the etching process of the dielectric layer above the gate oxide layer, especially the wet etching of the dielectric layer, since the dielectric layer has a relatively large etching selection for the gate oxide layer. , so it is difficult to precisely control the thickness of the gate oxide layer, resulting in poor device stabi...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/28H01L29/40
CPCH01L29/402H01L21/28158
Inventor 于明道郭振强
Owner HUA HONG SEMICON WUXI LTD