SRAM yield evaluation method based on improved adaptive importance sampling algorithm

Abstract

The invention discloses a memory circuit yield evaluation method based on improved adaptive importance sampling. The method can quickly and accurately evaluate the failure rate of static indexes and dynamic indexes of an SRAM unit. The method comprises the following steps: extracting related process parameters of an MOS transistor in PDK provided by a factory, and sampling N failure points throughhyperspherical sampling; constructing N joint normal distributions by using the N failure points, and establishing a corresponding mixed normal distribution as a distorted sampling function; in eachiteration, generating N sample points according to the previous N joint normal distributions; calculating the unbiased estimation of the failure rate and the weight value of the sample; normalizing the weight value of the sample, performing re-sampling according to the weight value, and updating the position parameter by using the re-sampled value; after a round of iteration is completed, judgingwhether variance correction is carried out or not, if not, updating the covariance matrix by utilizing an EM algorithm, and then starting iteration again until the relative deviation is less than 0.1;and otherwise, ending the algorithm and outputting a final result.

Description

technical field [0001] The invention relates to an SRAM yield evaluation method based on an improved self-adaptive importance sampling algorithm, which belongs to integrated circuit automatic design technology. Background technique [0002] Technological progress has given birth to high-density high-performance SRAM. On the one hand, SRAM occupies most of the area of ​​the chip. In order to make the chip meet the area constraints, the area of ​​the SRAM unit must be fully compressed. However, as the size shrinks, the SRAM unit is more affected by process fluctuations; on the other hand, advanced Under the process, the impact of process fluctuations such as threshold voltage, gate thickness, electron mobility, etc. on the circuit performance and reliability of SRAM cannot be ignored. For example, the thickness of the gate gate at 7nm is only a few atoms thick. At this time, the fluctuation of one atom may have an impact on the performance of the transistors that make up the ...

AI Technical Summary

Problems solved by technology

Each simulation takes a certain amount of time, which is unacceptable for evaluating the yield of SRAM cells

Images