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Semiconductor structure and manufacturing method thereof

A manufacturing method and semiconductor technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, transistors, etc., can solve problems such as design difficulties, rising pinch-off voltage, and inability to maintain low pinch-off voltage.

Pending Publication Date: 2020-08-28
NUVOTON
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  • Abstract
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AI Technical Summary

Problems solved by technology

[0004] Although the existing junction field effect transistors with semiconductor structures and their manufacturing methods have gradually met their intended purposes, there is always a trade-off relationship between the on-current and the pinch-off voltage of junction field-effect transistors. Generally speaking, it is necessary to increase the on-current When the pinch-off voltage is often increased, the pinch-off voltage cannot be kept low, which causes difficulties in design.

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Embodiment Construction

[0053]The device substrate, the semiconductor structure and the manufacturing method of the semiconductor structure according to some embodiments of the present invention will be described in detail below. It should be understood that the following description provides many different embodiments or examples for implementing different aspects of some embodiments of the invention. The specific components and arrangements described below are only for simple and clear description of some embodiments of the present invention. Of course, these are only examples rather than limitations of the present invention. Furthermore, repeated reference numerals or designations may be used in different embodiments. These repetitions are only for the purpose of simply and clearly describing some embodiments of the present invention, and do not represent any relationship between the different embodiments and / or structures discussed. Furthermore, when it is mentioned that a first material layer ...

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Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure includes: a substrate, a first conductivity type well, a second conductivity type buried layer, a first second conductivity type well, a first second conductivity type doped area, a second second-conductivity type well, and a second second-conductivity type doped area. The first conductivity type well is arranged on the substrate. The second conductivity type buried layer is disposed in the first conductivity type well and is separated from the substrate by a first predetermined distance. The first and second conductivity type wells are arranged in the first conductivity type well and are located on the second conductivity type buried layer, and are connected to the second conductivity type buried layer. The first and second conductivity type doped areas are arranged in the first and second conductivity type wells. The second second-conductivity type well is arranged in thefirst conductivity type well and above the second conductivity type buried layer, and is separated from the second conductivity type buried layer by a second predetermined distance. The second second-conductivity type doped region is arranged in the second second-conductivity type well.

Description

technical field [0001] The present invention relates to a semiconductor structure, in particular to a semiconductor structure of a junction field effect transistor with high current and low pinch-off voltage and a manufacturing method thereof. Background technique [0002] In the semiconductor industry, there are two main types of field effect transistors (FETs), the insulated gate field effect transistor (IGFET), commonly known as the metal oxide semiconductor field effect transistor (MOSFET). semiconductor field effect transistor, MOSFET), and junction field effect transistor (junction field effect transistor, JFET). The structural configurations of metal oxide semiconductor field effect transistors and junction field effect transistors are basically different. For example, the gate of a MOSFET includes an insulating layer, ie, a gate oxide, between the gate and the other electrodes of the transistor. Thus, the channel current in the Mosfet is controlled by an electric f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/66568H01L29/78
Inventor 韦维克席德·内亚兹·依曼陈柏安
Owner NUVOTON
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