Implementation method of cross-clock domain data interface

Abstract

The invention discloses an implementation method of a cross-clock domain data interface, and belongs to the technical field of data transmission. The method comprises the following steps: designing synchronizers: modifying two stages of synchronizers to enable one pulse width in an original clock domain to be only effective to single pulse output of a target clock domain; designing an FIFO buffer,wherein a register prt _ gap is arranged in the buffer and used for indicating a gap between pointers; designing a control module and a time sequence; setting a two-stage shift register synchronization circuit, so that a signal write generated in an original clock domain is synchronized to a target clock domain; improving universality of an asynchronous FIFO; wherein a 32-bit serial-parallel shift register is arranged, the 32-bit serial-parallel shift register is controlled through a serial-parallel shift register state machine, and serial signals are converted into 32-bit parallel signals. On the basis of deep analysis of cross-clock-domain data transmission, the cross-clock-domain data interface based on asynchronous FIFO is designed, and the problem of cross-clock-domain data transmission is solved.

Description

technical field [0001] The invention relates to the technical field of data transmission, in particular to a method for realizing a cross-clock domain data interface. Background technique [0002] With the advent of the information age and the rapid development of my country's aerospace industry, the continuous foreign sanctions in recent years have made my country attach great importance to integrated circuit technology. The rapid development of integrated circuit technology also promotes the development of on-chip systems. The development history of integrated circuits can be traced back to the birth of the world's first computer ENIAC in 1946, and has been following Moore's law to develop rapidly. Now it has entered the In the deep sub-nanometer stage, due to the development of microelectronics itself and market demand, the feature size of integrated circuits is getting smaller and smaller. When entering the era of nano-processing, a complex electronic system can be reali...

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Problems solved by technology

However, in recent years, with more and more data, the requirements for chips are getting higher and higher, and the use of asynchronous FIFO interfaces is also increasing. At present, the chips of many devices in my country rely on foreign imports, and some domestic manufacturers and The research institute develops the FIFO interface, but it is not systematic, and it cannot meet the needs of my country's equipment, and the excessive reliance on imports of FIFO buffers will seriously affect national security.

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