A method and system for locating the abnormality of the data line connecting the CPU to the DDR chip

Abstract

The invention discloses a method and a system for positioning abnormity of a data line for connecting a CPU with a DDR chip. The method aims at the situation that multiple DDR chips are connected in parallel to store data and comprises the following steps: data is read and written into a DDR chip; if the data line is abnormal, each DDR chip corresponds to a previous address space data bit, when acertain address is detected to be read and written abnormally, abnormal data is taken out, a fault data bit is calculated according to the abnormal data, hardware can be assisted in directly positioning the abnormal data line, and the range of checking PCB process problems can be narrowed. By adopting the embodiment of the invention, the data exception can be quickly and accurately positioned, andthe exception checking efficiency and the success rate are improved.

Description

technical field [0001] The invention relates to the technical field of electronic storage, in particular to a method and system for locating the abnormality of a data line connecting a CPU to a DDR chip. Background technique [0002] When the vehicle system is upgraded, there will be failures. One of the reasons is that there is a problem with the memory; in the prior art, multiple DDR chips are needed for data storage, and these multiple DDR chips are usually connected in parallel. , to increase the data bit width. [0003] Among the multiple DDR chips connected in parallel, if any one of the DDR chips is damaged, the wiring between the CPU data bit and the DDR chip is bad, or the DDR soldering is bad, the on-board system cannot operate normally due to memory abnormalities, for example, For example, the system often crashes and restarts for no reason, the application cannot be opened, the copied file data is lost, the system upgrade fails, the system cannot be started due ...

AI Technical Summary

Problems solved by technology

[0003] Among the multiple DDR chips connected in parallel, if any one of the DDR chips is damaged, the wiring between the CPU data bit and the DDR chip is bad, or the DDR soldering is bad, the on-board system cannot operate normally due to memory abnormalities, for example, For example, the system often crashes and restarts for no reason, the application cannot be opened, the copied file data is lost, the system upgrade fails, the system cannot be started due to data loss after restoring the factory settings, etc.

[0004] In the existing memory, the possibility of problems caused by the DDR chip is relatively low, and it is more likely to appear on the hardware circuit, and there are many upper data lines connecting the CPU to the DDR chip. It is also relatively difficult, so it takes a lot of time and energy to eliminate PCB process problems, and it is difficult to locate the abnormal data line. That is, in the prior art, it is very difficult to check the abnormality of the connection data line between the CPU and the DDR chip. Complicated, time-consuming and labor-intensive, and the accuracy is not high

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