Double-sided chip

Abstract

The invention provides a double-sided chip. The double-sided chip comprises a first layer and a second layer which are arranged in parallel; the upper surface of the first layer is provided with an input / output port; the lower surface of the second layer is provided with an input / output port; the lower surface of the first layer is attached to the upper surface of the second layer; a first functional circuit is arranged in the first layer; a second functional circuit is arranged in the second layer; the two ends of at least one via hole are connected with the first functional circuit and the second functional circuit respectively; the via holes are filled with conductive materials to achieve electric connection of the first functional circuit and the second functional circuit. The first functional circuit and the second functional circuit are arranged in parallel in a vertical direction; the electric connection is realized through the via holes; two surface of the chip are both provided with the input / output ports. Compared with the prior art that two circuits are arranged in parallel on a horizontal plane, the double-sided chip has the advantages that the area of the chip and thearea of a packaged module are greatly reduced, thereby achieving miniaturization.

Description

technical field [0001] The invention relates to the field of semiconductor packaging, in particular to a double-sided chip. Background technique [0002] As the integration of electronic devices continues to deepen, and electronic products tend to be miniaturized, this means that more components must be accommodated in a certain packaging space. This not only puts forward higher requirements for the packaging technology of electronic devices, but also requires the miniaturization of a single chip. [0003] In order to reduce the packaging area, the current common practice is to integrate the power circuit and the control circuit in one chip. Figure 1A is a side view of a chip structure, Figure 1B yes Figure 1A A top view of the structure shown, Figure 1C is a side view of another chip structure, Figure 1D yes Figure 1C Top view of the structure shown. See Figure 1A and Figure 1B , the power circuit 10 and the control circuit 11 are integrated in one chip 12, wh...

AI Technical Summary

Problems solved by technology

The above two structures, although the power circuit 10 and the control circuit 11 are integrated in one chip 12, reduce the number of internal chips in the package to a certain extent, and reduce the packaging volume, but because the power circuit 10 and the control circuit 11 are set On the same level, the area of ​​a single chip is increased, and the packaging area is not much reduced

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