Quantification and hardware acceleration method and device for multi-task neural network

Abstract

The embodiment of the invention relates to a quantification and hardware acceleration method and device for a multi-task neural network. The method comprises steps of obtaining a plurality of preset multi-task neural network models, and enabling the number of layers of the multi-task neural network models to be consistent; extracting a shared weight of the same layer in the plurality of multi-taskneural network models, and generating a corresponding weight code table, the weight code table including the shared weight; training samples of the multiple multi-task neural network models are obtained, shared feature values being analyzed from the training samples, a corresponding feature value code table being generated, and the feature value code table comprising the shared feature values; and putting a plurality of multi-task neural network models into neural network accelerator hardware, and accelerating a plurality of multi-task neural network models based on the weight code table andthe feature value code table.

Description

technical field [0001] Embodiments of the present invention relate to the field of hardware acceleration of deep neural network models, and in particular, to a quantization and hardware acceleration method and device for multi-task neural networks. Background technique [0002] Deep neural networks have achieved good results in tasks such as image processing, speech recognition, and natural language processing. At the same time, they have been widely used in scenarios such as terminal devices and cloud data centers, and there have been many dedicated methods for accelerating deep neural networks. There are hardware designs, namely neural network accelerators. The deep neural network model usually has a huge amount of parameters and calculations, and the multiplication and addition operations occupy the vast majority of the calculations. Therefore, the neural network accelerator usually uses an array multiply and accumulate (MAC, multiply and accumulate) to Improve computing...

AI Technical Summary

Problems solved by technology

[0003] During the training process of the neural network model, 32bit floating-point numbers (fp32) are usually used to save the parameters and activation values ​​of the model, but the storage, transmission, and operation of floating-point numbers will bring greater hardware overhead than fixed-point numbers.

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