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2t2r resistive memory, mcu and device with differential architecture

A resistive memory, 2T2R technology, applied in static memory, read-only memory, information storage, etc., can solve the problems of low reliability of resistive memory, and achieve the solution of insufficient consistency, accurate and stable reading, and storage. The effect of power-off retention of density data

Active Publication Date: 2021-11-09
SHENZHEN GOODIX TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, there are still many technical problems in RRAM technology at present. For example, various parasitic and line noises in RRAM will adversely affect the reading of high-resistance state or low-resistance state, thus causing RRAM The problem of low reliability

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  • 2t2r resistive memory, mcu and device with differential architecture
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  • 2t2r resistive memory, mcu and device with differential architecture

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Embodiment Construction

[0024] In order to make the purposes, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments It is a part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

[0025] The terms "first", "second", "third", "fourth", etc. (if any) in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and not necessarily Used to describe a specific sequence or sequence. It is to be understood that the data so used are interchangeable under appropriate circumstances s...

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Abstract

The present application provides a 2T2R resistive memory with a differential architecture, an MCU and a device. The memory includes a memory cell array composed of a plurality of memory cells; each memory cell includes a first transistor, a second transistor, a first resistive device and a second resistive device; the gate of the first transistor and the gate of the second transistor are connected to the same word line, the source of the first transistor and the source of the second transistor are connected to the first bit line and the second bit line respectively, and the drain of the first transistor is connected to the first resistive switch device. One electrode is connected, the drain of the second transistor is connected to the first electrode of the second resistive switch device, and the second electrode of the first resistive switch device and the second electrode of the second resistive switch device are connected to the same source line; the first The resistive switch device and the first electrode of the second resistive switch device are located in the same layer, and the first resistive switch device and the second electrode of the second resistive switch device are located in the same layer. Therefore, the reliability of the memory can be guaranteed.

Description

technical field [0001] The present application relates to the technical field of semiconductor memory, and in particular to a 2T2R resistive memory with a differential architecture, a micro control unit (Micro Controller Unit, MCU) and equipment. Background technique [0002] Resistive Random Access Memory (RRAM) is a new type of non-volatile memory (Non-volatile Memory, NVM) that uses the variable resistance of the device to achieve data storage, because of its low operating power consumption, It has attracted much attention due to its fast reading and writing speed. [0003] Usually RRAM includes: an array composed of multiple memory cells. Common memory cell structures include 1T1R, 1D1R, 1S1R, etc., where T refers to a transistor (Transistor), R refers to a resistive switching device (Resistive Switching Device), and D refers to Is a diode (Diode). figure 1 A schematic diagram of a memory cell array of a 1T1R structure provided for the prior art, such as figure 1 As s...

Claims

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Application Information

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IPC IPC(8): G11C17/14
CPCG11C17/14
Inventor 姚国峰沈健
Owner SHENZHEN GOODIX TECH CO LTD