Method for improving stay wire abnormity in micro-lens process

A technology of micro-lens and process, which is applied in the directions of lenses, optics, instruments, etc., can solve problems such as wire drawing and 45° twill, and achieve the effects of simple implementation, improvement of wire drawing problems, and reduction of inhomogeneity

Pending Publication Date: 2020-11-20
SHANGHAI INTEGRATED CIRCUIT RES & DEV CENT +1
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  • Application Information

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Problems solved by technology

Therefore, in the above-mentioned existing microlens manufacturing process, when carrying out the photolithography of the microlens material layer 12, it is easy to have a "drawing line" problem due to the difference in the photolithography angle. Anomalies with e.g. 45° twill

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  • Method for improving stay wire abnormity in micro-lens process
  • Method for improving stay wire abnormity in micro-lens process
  • Method for improving stay wire abnormity in micro-lens process

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Embodiment Construction

[0029] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0030] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.

[0031] In the following specific embodiments of the present invention, please refer to Figure 5 , Figure 5 It is a flow chart of the method for improving the abnormality of the wire drawing in the microlens process of the present invention. At the same time, please refer to Figure 6-Figure 11 , Figure 6-Figure 11 is the invention according to ...

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Abstract

The invention discloses a method for improving stay wire abnormity in a micro-lens process. The method comprises the following steps of 1, providing an image sensor chip before the micro-lens processis completed, arranging a first structure and a second structure on the surface of the chip, and ensuring that the height of the first structure is higher than that of the second structure; 2, forminga filling layer on the surface of the chip, and covering the first structure and the second structure; 3, removing a filling layer material on the surface of the first structure through photoetchingand developing, and forming a new flat surface on the surface of the chip; 4, sequentially covering the new flat surface with the flat layer and a micro-lens material layer; and 5, photoetching the micro-lens material layer to form a micro-lens with a consistent photoetching angle. The method can be used to effectively reduce the non-uniformity of the surface of the chip and remarkably reduce a reject ratio of stay wires, and is simple in implementation.

Description

technical field [0001] The invention relates to the technical field of integrated circuit and image sensor manufacturing, in particular to a method for improving the abnormality of wire drawing in the microlens process when manufacturing CMOS image sensor chips. Background technique [0002] Please refer to Figure 1-Figure 3 , Figure 1-Figure 3 It is a schematic diagram of an existing microlens manufacturing process. Such as figure 1 As shown, in the microlens process when manufacturing a CMOS image sensor chip, a planarization layer (PL) 11 needs to be coated on the surface of the top layer structure of the chip 10 first. Next, if figure 2 As shown, a layer of microlens material (MicroLens, ML) 12 is continuously coated on the planar layer 11 . Then, if image 3 As shown, the photolithography of the microlens material layer is performed to form the microlens 121 . [0003] Please refer to Figure 4 , Figure 4 It is a schematic diagram of the top layer structure ...

Claims

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Application Information

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IPC IPC(8): H01L27/146G02B3/00
CPCH01L27/14627H01L27/14685G02B3/0012
Inventor史海军叶红波温建新
OwnerSHANGHAI INTEGRATED CIRCUIT RES & DEV CENT