Magnetic memory reading circuit capable of resisting single-event double-node upset based on DICE

A dual-node flipping and magnetic memory technology, applied in the field of magnetic memory read circuits, can solve problems such as unreliable data reading

Active Publication Date: 2020-12-08
HEFEI INNOVATION RES INST BEIHANG UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] Aiming at the above-mentioned problem of unreliable data reading caused by double-node flipping in the differential signal reading circuit, the existing anti-single event flipping technical solution cannot solve it, so the purpose of the present invention is to propose a DICE-based anti-single event flipping solution. A magnetic memory read circuit with single-event double-node flipping solves the above disadvantages and improves the radiation resistance of MRAM

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  • Magnetic memory reading circuit capable of resisting single-event double-node upset based on DICE
  • Magnetic memory reading circuit capable of resisting single-event double-node upset based on DICE
  • Magnetic memory reading circuit capable of resisting single-event double-node upset based on DICE

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Embodiment Construction

[0057] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments It is a part of embodiments of the present invention, but not all embodiments.

[0058] An embodiment of the present invention is a magnetic memory read circuit based on DICE anti-single-event double-node flipping, which can not only realize the function of reading data information with high speed and low power consumption, but also has anti-single-event double-node in the process of reading data information. The ability to flip. The substantive features of the present invention will be further described below according to the accompanying drawings and specific implementation examples.

[0059] A magnetic tunnel junction (Magne...

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Abstract

The invention discloses a magnetic memory read circuit capable of resisting single-event double-node upset based on DICE. The input end of a pre-charging circuit module is connected with a pre-charging signal PRE; The output end of the pre-charging circuit is connected with an internal node Q1, an internal node Q2, an internal node Q3, an internal node Q4, an internal node Q5 and an internal nodeQ6 of a latch circuit module. The output end of the latch circuit is connected with the input end of a read circuit separation module. The output end of the read circuit separation module is connectedwith a bit line BL1, a bit line BL2, a bit line BL3, a bit line BL4, a bit line BL5 and a bit line BL6 of a magnetic random access memory storage unit having data information is to be read. The inputend of an output circuit module is connected with the internal node Q1, the internal node Q3 and the internal node Q5 of the latch circuit module. The output end OUT of an output circuit module is the output end of the magnetic memory read circuit. According to the magnetic memory read circuit, not only can a data information reading function be realized at a high speed and low power consumption, but also the single-event double-node upset resistance is realized in the data information reading process.

Description

technical field [0001] The invention relates to the field of anti-radiation hardening of integrated circuits and non-volatile storage intersecting technologies, in particular to a magnetic memory read circuit based on DICE anti-single-event double-node flipping. Background technique [0002] Magnetic random access memory (Magnetic Random Access Memory, MRAM) has great application potential in the aerospace field in the future due to its non-volatile, low power consumption, fast access, inherent radiation resistance and other characteristics. MRAM is mainly composed of a memory cell array and peripheral read and write circuits. As a memory cell of MRAM, a magnetic tunnel junction (Magnetic TunnelJunction, MTJ) is mainly composed of two ferromagnetic layers and a tunneling barrier layer sandwiched in the middle. One of the ferromagnetic layers has a fixed magnetization direction and is called a pinned layer; while the other ferromagnetic layer has a variable magnetization dir...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/16
CPCG11C11/1673G11C11/161G11C11/1697
Inventor 张德明王贤张凯丽赵巍胜
Owner HEFEI INNOVATION RES INST BEIHANG UNIV
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