Clock control circuit, chip and clock control method

Abstract

The invention discloses a chip with a clock control circuit, a clock control method and the clock control circuit, the clock control circuit is applied to the chip, a first clock source is arranged inthe chip, and the clock control circuit comprises a failure detection circuit and a clock gating circuit; the failure detection circuit is connected with the first clock source and a preset second clock source, the failure detection circuit is used for detecting whether a main clock source of the chip fails or not, and the main clock source of the chip is the first clock source or the second clock source; and the clock gating circuit is connected with the failure detection circuit, the first clock source and the second clock source, and the clock gating circuit is used for switching the mainclock source of the chip when the main clock source of the chip fails according to the output signal of the failure detection circuit. According to the chip, different clock sources are selected as chip clocks according to requirements, clock source switching can be carried out in time through the clock control circuit, and enough safety guarantee measures are provided for a chip system.

Description

technical field [0001] The invention belongs to the technical field of chips, in particular to a chip with a clock control circuit and a clock control method using the chip. Background technique [0002] The system clock is the source power and metronome that drives the orderly work of the entire chip system, and is the heart of the entire chip system. Once the system clock fails and stops working, the entire chip system will directly hang up. [0003] Since the development of the chip, it has been widely used in the industry. More and more chips have been applied to scenarios involving the safety of users' lives and property. How to ensure the safety of the chip and ensure that it has the ability to deal with system clock failures is the core of the chip. Issues that technology designers should consider. [0004] In many SOC-level chips, there are usually one or more fixed-frequency clock sources inside the chip to ensure that the system can start normally. In the use of...

AI Technical Summary

Problems solved by technology

Compared with the internal clock source, the external board-level clock source is more likely to have a clock stop or discontinuous fault due to various reasons. When the system clock uses an external clock as the clock source directly or indirectly and the external clock fails In this case, if no special treatment is done, the entire chip system will directly hang up

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