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Method and apparatus for access line management of memory cell arrays

A technology of memory unit and access line, which is applied in the direction of static memory, digital memory information, information storage, etc.

Active Publication Date: 2021-12-21
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

FeRAM can use a device architecture similar to volatile memory, but may have non-volatile properties due to the use of ferroelectric capacitors as storage devices

Method used

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  • Method and apparatus for access line management of memory cell arrays
  • Method and apparatus for access line management of memory cell arrays
  • Method and apparatus for access line management of memory cell arrays

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Embodiment Construction

[0018] Some memory arrays may include a plate that is common to multiple memory cells that are also associated with multiple digit lines and / or multiple word lines. Because the voltage of the plate (and thus also the voltage of the associated plate line) fluctuates (eg, between a high voltage and a low voltage) in relation to the access operation for the selected memory cell, some memory devices may use the Each word line of unselected memory cells common to the panel (which may be referred to as an unselected word line) is maintained at a fixed voltage. This may result in leakage currents and associated Link power loss. Where a plate is common to many memory cells, the amount of capacitance (e.g., parasitic capacitance) and unintended cross-coupling between the plate and unselected word lines can be significant, and thus, the amount of associated power loss can be significant . Parasitic signals due to such unintended cross-coupling, along with additional power consumption...

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Abstract

This application relates to access line management for memory cell arrays. Some memory devices may include a plate coupled with memory cells associated with multiple digit lines and / or multiple word lines. Because the plates are coupled with multiple digit lines and / or word lines, unintended cross-coupling between various components of the memory device can be significant. To mitigate the effects of unintended cross-coupling between various components, the memory device may float unselected word lines during one or more portions of an access operation. Therefore, the voltage of each unselected word line can be related to the voltage of the plate, since plate voltage changes may occur.

Description

[0001] cross reference [0002] This patent application asserts a PCT application entitled "ACCESS LINE MANAGEMENT FOR AN ARRAY OF MEMORYCELLS" filed April 3, 2019 by Vimercati priority of PCT / US2019 / 025636, claiming a patent application entitled "ACCESS LINEMANAGEMENT FOR AN ARRAY OF MEMORY CELLS), each of which is assigned to the present assignee, and the entirety of each of which expressly incorporated herein by reference. technical field [0003] The technical field relates to access line management for memory cell arrays. Background technique [0004] The following relates generally to managing access to memory cells, and more specifically to access line management for arrays of memory cells. [0005] Memory devices are widely used to store information in various electronic devices such as computers, wireless communication devices, cameras, digital displays, and the like. Information is stored by programming different states of the memory device. For example, a bi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/22
CPCG11C11/221G11C11/2259G11C11/2257
Inventor D·维梅尔卡蒂
Owner MICRON TECH INC