Etching process and manufacturing process of 3D NAND

Abstract

The invention provides an etching process and a manufacturing process of a 3D NAND. The etching process comprises the following steps: S1, providing a substrate stacking structure with a channel holeand forming an epitaxial layer at the bottom of the channel hole; S2, arranging functional layer structures on the side walls of the channel holes and the top of the substrate stacking structure, andpolycrystalline silicon layers of the functional layer structures being exposed; S3, etching the polycrystalline silicon layer at the bottom of the functional layer structure by adopting dry etching which is plasma etching, and performing plasma generation on plasma etching by adopting synchronous pulses of a source radio frequency power source and a bias radio frequency power source; and S4, etching the functional layer structure at the bottom of the channel hole by adopting dry chemical etching so as to expose the epitaxial layer. A source radio frequency power source and a bias radio frequency power source are adopted for synchronous pulse generation of plasmas, redundant dissociation of the side wall polycrystalline silicon layer is effectively relieved, and the thickness of the etchedside wall polycrystalline silicon layer is guaranteed.

Description

technical field [0001] The invention relates to the technical field of 3D NAND flash memory, in particular to an etching process and a 3D NAND manufacturing process. Background technique [0002] Flash memory (Flash Memory) is also called flash memory. The main feature of flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc. , so it has become the mainstream memory of non-volatile memory. According to different structures, flash memory is divided into NOR Flash Memory and NAND Flash Memory. Compared with NOR Flash Memory, NAND Flash Memory can provide high cell density, high storage density, and faster writing and erasing speed. [0003] However, the current development of planar flash memory has encountered various challenges: physical limits, such as exposure technology limits, development technology limits, and storage electron density limits. ...

AI Technical Summary

Problems solved by technology

[0014] The main purpose of the present invention is to provide an etching process and a 3D NAND manufacturing process to solve the problem that the SONO etching process easily causes excessive damage to the sidewall polysilicon in the prior art

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