FPGA-based embedded data caching system

Abstract

The invention provides an FPGA-based embedded data caching system, which comprises an FPGA soft core, a DDR controller and a Dcache module, and is characterized in that the FPGA soft core is in communication connection with the DDR controller and the Dcache module through buses; the DDR controller is used for accessing data of an external DDR; the Dcache module is used for forcibly refreshing or forcibly writing back the data; and the FPGA soft core sends a forced refresh or forced write-back instruction, and the Dcache module receives the forced refresh to reset the Tag in the Dcache module,or the Dcache module receives the forced write-back instruction to write back the data in the Dcache module to the DDR. The FPGA soft core is used for sending a forced write-back or forced refreshingstarting signal, the Dcache module is triggered to execute forced write-back or forced refreshing operation, namely, data of the Dcache module is written back into DDR particles or Tag information inthe Dcache module is removed, an end mark is fed back to the FPGA soft core after forced write-back or forced refreshing is completed, and therefore, the problem that the data in the DDR of the off-chip storage device is inconsistent with the data in the Dcache module after being updated is solved.

Description

【Technical field】 [0001] The present invention relates to the technical field of FPGA, in particular to an embedded data cache system based on FPGA. 【Background technique】 [0002] FPGA (Field Programmable GateArray) has the characteristics of flexible programming and reconfigurability, as well as rich underlying hardware resources and IP cores, so it has a large application space in the field of embedded industrial control. Especially the realization of embedded soft core in FPGA, namely MUC, is an important embodiment of FPGA supporting industrial control. However, in the scenario where the data cache or peripheral data is large, the embedded soft core needs to allocate a large space for the data segment. Therefore, only using the storage space and simple data channels on the FPGA chip can no longer meet the needs of complex application scenarios. [0003] In practical applications, the amount of data processed by the FPGA often far exceeds the storage space on the FPGA ...

AI Technical Summary

Problems solved by technology

[0005] The object of the present invention is to provide a kind of FPGA-based embedded data caching system that solves the problem of inconsistency with cache data after the data in the storage device DDR outside the chip is updated

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