A One-Dimensional dct/idct Transformer Using Bit-Vector Transform, Accumulate and Shift

Abstract

The present invention proposes a one-dimensional DCT / IDCT converter that transforms, accumulates and shifts a bit vector to solve the problem that the DCT / IDCT converter in the existing HEVC standard uses a large number of dedicated multipliers to occupy too many logic unit resources. The invention includes a counting and state controller, a bit vector generator, a bit vector converter and a transformation result assembler; the counting and state controller is respectively connected with the bit vector generator, the bit vector converter and the transformation result assembler; The bit vector generator is connected to a bit vector transformer, and the bit vector transformer is connected to a transformation result assembler. The invention adopts the combination of accumulation and shift to realize the multiplier of input data, which can save a large number of logic units of FPGA or ASIC; because the number of clock cycles of accumulation processing is fixed, it only depends on the two's complement number of input data, and it is easy to carry out Timing design, and can realize DCT transform and IDCT transform in a unified structure.

Description

technical field [0001] The invention relates to the technical field of digital video compression encoding and decoding, and in particular to a one-dimensional DCT / IDCT converter with bit vector transformation, accumulation and shift, which is used for integer approximation implemented by FPGA or ASIC in the High Efficiency Digital Video Coding Standard (HEVC). The discrete cosine transform / inverse discrete cosine transform (DCT / IDCT). Background technique [0002] The High Efficiency Video Coding Standard (HEVC) adopts a block-based hybrid video compression coding framework, and the core transform matrix sizes of the two-dimensional approximation DCT transform specified by it are 4 × 4, 8 × 8, 16 × 16 and 32 × 32. Similarly, The core transform matrix sizes of the two-dimensional approximation IDCT transform are 4×4, 8×8, 16×16 and 32×32. The two-dimensional transformation is separable, that is, it can be realized by performing independent one-dimensional N-point row transfo...

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Problems solved by technology

However, although this scheme supports the multiplexing of smaller-sized transform blocks, it can only transform blocks of one size. When transforming small-sized blocks, the resource utilization efficiency is low.

[0006] Another main solution to reduce the number of multiplication operations is to use the even-based vector of DCT to be symmetric, and the odd-based vector to be anti-symmetrical, and use the butterfly operation to reduce the amount of arithmetic operations, especially the amount of multiplication operations, but this method cannot for IDCT transform

[0007] The existing DCT or IDCT transformation of integer approximation can be regarded as using the transformation matrix to process the input data vector, that is, in the implementation of FPGA and ASIC, the integer multiplier of the transformation matrix is ​​realized by combining shift and addition, because the transformation and The base vectors of the inverse transformation matrix have different symmetry, and only some parts of the DCT and IDCT transformations can be shared.

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