Bare computer system-level excitation cross compiling system and compiling method

Abstract

The invention discloses a bare-computer system-level excitation cross-compiling system and compiling method, and the system comprises: a test excitation module which is used for compiling and storingthe directional and random excitation of a corresponding bare-computer system-level verification function point; the library file module that is used for realizing the function of a bare computer startup program and a shared function in an incentive development process; the CPU kernel configuration module that is used for realizing target CPU configuration; the compiling link module that is used for describing a link mode of the executable file and analyzing the binary file to generate a disassembling code which can be used for debugging; and the compiling environment analyzing and assemblingmodule that is used for analyzing the configuration to generate a corresponding file and assembling to generate an executable binary file. The method can be implemented based on the system. The invention has the advantages of being good in flexibility, wide in application range, capable of improving simulation efficiency and the like.

Description

technical field [0001] The invention mainly relates to the technical field of integrated circuit verification, and particularly relates to a bare-metal system-level excitation cross-compilation system and a compilation method. Background technique [0002] With the rapid development of integrated circuits, the scale of CPU (central processing unit, central processing unit) is getting larger and larger, the higher the circuit complexity, the higher the verification requirements, the more complex the verification work, and the higher the verification efficiency. requirements are also higher. [0003] From the verification process, verification is divided into module-level, subsystem-level, bare-metal system-level and system-level testing. The module-level verification is used to verify the function and design of a specific module; the subsystem-level verification is the combined verification of some modules, which is used to test the connection between modules and the functio...

AI Technical Summary

Problems solved by technology

[0006] First, it is necessary to analyze and separate the startup programs of different architecture platforms, and the workload of transplantation is relatively large, which is not conducive to secondary development

[0007] Second, u-boot is a relatively mature bare-metal boot program, its code level is complex, and the redundant code introduced during the transplantation process will lead to a long compilation and loading time of the bare-metal boot program, reducing the efficiency of bare-metal system-level simulation tests

[0008] To sum up, direct use of u-boot is not flexible and efficient enough for a bare-metal incentive compilation environment of a specific architecture.

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