Array substrate and manufacturing method thereof

Abstract

The invention provides a manufacturing method of an array substrate and a manufacturing method of the array substrate. The manufacturing method of the array substrate comprises the following steps: S1, forming a patterned gate metal layer; S2, forming a gate insulating layer; S3, forming a semiconductor layer; S4, forming a source-drain cushion layer; S5, depositing a first insulating layer; S6, forming a first contact hole; S7, forming a common electrode; S8, forming a second contact hole, wherein the second contact hole and the first contact hole are communicated with each other; S9, forminga pixel electrode, enabling the pixel electrode to be in contact with the common electrode through the second contact hole, and enabling the pixel electrode to be in contact with the gate metal layerthrough the third contact hole. According to the array substrate, the organic insulating layer and the first insulating layer are etched under the common electrode, so that the segment difference between deep and shallow contact holes is reduced, and the over-etching problem of the common electrode is reduced; meanwhile, the source-drain cushion layer positioned on the semiconductor layer is added, so that the pixel electrode is over-etched and is connected with the common electrode through the source-drain cushion layer.

Description

technical field [0001] The present invention relates to the technical field of panel display, and in particular, to an array substrate and a manufacturing method thereof. Background technique [0002] The liquid crystal display device is the most widely used flat panel display device at present. The liquid crystal display panel includes an array substrate and a color filter substrate arranged oppositely. The array substrate is manufactured by a multi-patterning process to form a plurality of thin film patterns. Processes include masking, exposure, development, etching, and stripping. In order to reduce the price of liquid crystal display panels and improve product yield, technicians are working to reduce the number of patterning processes. [0003] Usually, the array substrate using IGZO semiconductor is made by 9 mask processes. In order to reduce the material cost, 7 mask processes are developed. The 7 mask process reduces the etching barrier layer ES and the gate insulati...

AI Technical Summary

Problems solved by technology

[0005] The first contact hole H1 is a shallow hole, and the second contact hole H2 is a deep hole. The step difference between the first contact hole H1 and the second contact hole H2 is relatively large, which often causes the common electrode 16 under the first contact hole H1 to be overcut. The common electrode 16 is missing and cannot be effectively contacted with the pixel electrode 18, thereby affecting the connection between the common electrode and the gate metal layer

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