A method for preparing and packaging multiple chips at the same time
A chip and chip array technology, applied in the field of simultaneous preparation and packaging of multiple chips, can solve problems such as the increase in the cost of SiC material devices, increase process complexity, reduce design complexity and preparation process complexity, and improve product application value. Effect
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[0036] The invention discloses a method for preparing, packaging and using multiple chips at the same time, which is mainly suitable for small-volume, high-power silicon carbide devices. The application situation is mainly for array units. The invention is mainly but not limited to the following Happening:
[0037] In the case of using in module A, when multiple identical low-current chips are required, the chips in the array can be used in different positions of the module through an external circuit;
[0038] B In circuits that require high reliability, since the chips in the array unit are tape-outs of the same batch and the same chip, the device consistency is high, and the devices can back up each other;
[0039] C Even only from the perspective of cost reduction, the different chips of the array unit are connected in parallel and independent of each other. Through testing and screening, the waste chips in the array unit can be eliminated without wire bonding (or after wi...
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