Silicon carbide planar MOSFET device and preparation method thereof

A silicon carbide and device technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., to achieve the effects of reducing leakage current, large forward and reverse symmetrical withstand voltage, and large reverse withstand voltage

Active Publication Date: 2021-04-20
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] The purpose of the present invention is to solve the problem of how to make the planar silicon carbide MOSFET have a large positive and negative symmetrical withstand voltage and how to reduce its conduction voltage drop

Method used

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  • Silicon carbide planar MOSFET device and preparation method thereof
  • Silicon carbide planar MOSFET device and preparation method thereof
  • Silicon carbide planar MOSFET device and preparation method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0106] A silicon carbide planar MOSFET device, its cell structure is as follows figure 2 As shown, its half-cell structure includes a back drain metal 1, a second N-type silicon carbide buffer layer 21, and an N-type silicon carbide epitaxial layer 3, which are sequentially stacked from bottom to top.

[0107] Above the N-type silicon carbide epitaxial layer 3 is the first N-type silicon carbide buffer layer 11, the first N-type silicon carbide buffer layer 11 includes a vertical section in the middle and horizontal sections on both sides, the first N-type silicon carbide buffer layer 11 The upper left is the first P-type base region 4, inside the first P-type base region 4 is the first P-type source region 5 and the first N-type source region 7, the first P-type source region 5 and the first N-type source region The region 7 is connected left and right, and the first source metal 6 is respectively connected to the first P-type source region 5 and part of the first N-type sou...

Embodiment 2

[0125] A silicon carbide planar MOSFET device, its cell structure is as follows image 3 shown, including:

[0126] Its half-cell structure includes a back drain metal 1, a second N-type silicon carbide buffer layer 21, and an N-type silicon carbide epitaxial layer 3 stacked sequentially from bottom to top.

[0127]Above the N-type silicon carbide epitaxial layer 3 is the first N-type silicon carbide buffer layer 11, the first N-type silicon carbide buffer layer 11 includes a vertical section in the middle and horizontal sections on both sides, the first N-type silicon carbide buffer layer 11 The upper left is the first P-type base region 4, inside the first P-type base region 4 is the first P-type source region 5 and the first N-type source region 7, the first P-type source region 5 and the first N-type source region The region 7 is connected left and right, and the first source metal 6 is respectively connected to the first P-type source region 5 and part of the first N-typ...

Embodiment 3

[0146] A silicon carbide planar MOSFET device such as Figure 4 As shown, its cellular structure includes:

[0147] Its half-cell structure includes a back drain metal 1, a second N-type silicon carbide buffer layer 21, and an N-type silicon carbide epitaxial layer 3 stacked sequentially from bottom to top.

[0148] Above the N-type silicon carbide epitaxial layer 3 is the first N-type silicon carbide buffer layer 11, the first N-type silicon carbide buffer layer 11 includes a vertical section in the middle and horizontal sections on both sides, the first N-type silicon carbide buffer layer 11 The upper left is the first P-type base region 4, inside the first P-type base region 4 is the first P-type source region 5 and the first N-type source region 7, the first P-type source region 5 and the first N-type source region The region 7 is connected left and right, and the first source metal 6 is respectively connected to the first P-type source region 5 and part of the first N-ty...

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Abstract

The invention belongs to the technical field of power semiconductor devices, and particularly relates to a silicon carbide planar MOSFET device and a preparation method thereof. Compared with a traditional planar silicon carbide MOSFET, the silicon carbide planar MOSFET device of the invention has the following advantages: an N-type silicon carbide substrate is removed, a first N-type silicon carbide buffer layer is introduced to one side of a source region of the device, a second N-type silicon carbide buffer layer is introduced to one side of a drain region of the device, and a P-type polycrystalline silicon / N-type silicon carbide heterojunction and disconnected P-type regions are introduced to one side of the drain region of the device. With the device with the above structure, the planar silicon carbide MOSFET is allowed to have relatively small forward conduction voltage drop while obtaining large forward and reverse symmetrical withstand voltage. In addition, in order to further improve the withstand voltage and conduction characteristics of the device, several corresponding derivative structures are provided.

Description

technical field [0001] The invention belongs to the technical field of power semiconductor devices, and in particular relates to a silicon carbide planar MOSFET device and a preparation method thereof. Background technique [0002] The inverter is a device that converts direct current into alternating current. It has a wide range of application scenarios, such as photovoltaic inverters, uninterruptible power supplies, rail transit and trolleybuses, and frequency converters. Multilevel inverters have excellent characteristics such as low loss, low noise, and output waveforms close to sine waves, so their application scenarios are broader. Matrix inverter is a new type of power converter, which can directly realize AC-AC conversion. Compared with the traditional AC-DC-AC frequency conversion method, the matrix inverter does not require DC capacitors for intermediate energy storage, which improves the reliability of the entire system and reduces costs. [0003] Bidirectional ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L29/08H01L29/06H01L21/336
Inventor 张金平王鹏蛟李小锋刘竞秀张波
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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