Window type successive approximation analog-to-digital converter and control method

Abstract

The invention discloses a window type successive approximation analog-to-digital converter and a control method. The window type successive approximation analog-to-digital converter specifically comprises a capacitor array digital-to-analog converter, a time domain comparator and control logic. According to the invention, the window voltage is set according to the information of the relative magnitude of the input voltage provided by the time domain comparator, and whether a redundant comparison period is skipped or not is determined according to the relationship between the voltage of the polar plate on the capacitor array and the window voltage in the successive approximation process, thereby achieving the purpose of power consumption optimization.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, in particular to a window-type successive approximation analog-to-digital converter and a control method. Background technique [0002] With the continuous development of Internet of Things technology, the "Internet of Everything" is getting closer to people's lives. As the core of the Internet of Things system, the power consumption of sensor nodes has become one of the important factors restricting the performance of the sensor system. One of the core components of the sensor - the performance of the analog-to-digital converter determines the performance of the sensor to a large extent. Sensor nodes usually have strict requirements on power consumption. Therefore, successive approximation analog-to-digital converters with low power consumption, medium resolution and medium conversion speed are especially suitable for sensor nodes. [0003] In the traditional successive approximati...

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Problems solved by technology

[0004] Based on this, the present invention proposes a window-type successive approximation analog-to-digital converter and a control method for the problems of high power consumption of the voltage domain comparator and low efficiency of the binary stepwise search approximation in the traditional successive approximation analog-to-digital converter

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