Noise suppression high-voltage level shift circuit based on delay self-locking

Abstract

The invention provides a self-locking noise suppression circuit based on noise signal delay superposition, by reasonably setting the locking pulse width of the noise signal, the propagation path of the noise signal can be effectively suppressed, and meanwhile, the propagation of a normal working signal is not influenced; and the circuit structure and the used modules are simple, the occupied area is small, and the reliability and the application value are relatively high.

Description

technical field [0001] The invention relates to a noise-suppressing high-voltage level shift circuit, in particular to a noise-suppressing high-voltage level shift circuit based on time-delay self-locking. Background technique [0002] The high-voltage level shift circuit is mainly used to turn on the high-side MOSFET or IGBT power transistor, and is a key circuit for converting low-voltage logic signals to high-voltage signals. In order to realize the correct turn-on and turn-off of the high-side power transistor, its gate voltage V gs The level range is changed between the high-voltage power supply VB and the floating ground VS to ensure that the gate-source voltage difference is greater than the turn-on threshold voltage of the power transistor. For traditional narrow pulse trigger level shift circuits (such as figure 1 ), the floating ground VS will float between 0V and high voltage, and then generate dV / dt noise in the circuit. The large dV / dt noise can generate disp...

AI Technical Summary

Problems solved by technology

For bypass capacitor common-mode noise suppression circuits, high-voltage capacitor technology is generally required, which has a high technical threshold and is difficult to implement

For the noise interlock circuit composed of gate-source short-connected LDMOS power transistor and PMOS, the redundant LDMOS transistor will occupy a large layout area, which greatly increases the product cost

In addition, the noise suppression circuit using multiple differential amplifiers also faces the problems of circuit matching and high-voltage stability, and there are certain risks in specific applications.

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