A fault injection circuit for VLSI

Abstract

The invention discloses a fault injection circuit for ultra-large scale integrated circuits, which belongs to the technical field of basic electronic circuits. The circuit includes a fault injection module and a fault injection state machine module. The fault injection module includes the generation of fault data, the selection of fault injection objects and time-division multiplexing logic. The generation of fault data is to add a lookup table and data selector to the trigger, and generate different fault data according to the type of fault; the selection of fault injection objects It is to assign unique ID numbers to all flip-flops in the circuit in turn, and then select a specific flip-flop to inject faults by analyzing the IDs through the decoding circuit; the time-division multiplexing logic mainly divides the time into two parts: fault injection and normal operation; The fault injection state machine mainly controls the fault injection process according to the fault injection parameters to simulate the single event effect; when implementing this circuit on the Zynq-7000 SoC, the fault injection mechanism can be optimized through the interaction of PS and PL, and the fault injection speed can be accelerated.

Description

technical field [0001] The invention relates to the reliability of integrated circuits and the fields of aerospace and aerospace, mainly relates to the research of single event effect-oriented fault injection technology, specifically discloses a fault injection circuit oriented to ultra-large-scale integrated circuits, and belongs to the technical field of basic electronic circuits. Background technique [0002] With the development of manufacturing technology, the feature size of integrated circuits is gradually reduced, and the energy threshold required to change the working state of the circuit is geometrically decreasing, which makes integrated circuits more susceptible to radiation exposure. Various radiation sources existing in the cosmic environment are very easy to induce working errors in integrated circuits. One of the effects of irradiation on integrated circuits is called the single event upset (Single Event Upset, SEU) effect, which is mainly manifested as bit f...

AI Technical Summary

Problems solved by technology

This type of method is implemented based on the internal dedicated port of the FPGA, without additional resource overhead, but the reconfiguration function is highly dependent on the support of the FPGA hardware, and the time consumed by the bit file configuration of the FPGA can easily become the bottleneck of the fault injection speed

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