Semiconductor structure and manufacturing method thereof

Abstract

The embodiment of the invention relates to a semiconductor structure and a manufacturing method thereof. The manufacturing method of the semiconductor structure comprises the steps of providing a substrate and a welding pad located on the substrate, forming an insulating medium layer on the substrate, wherein the insulating medium layer covers the welding pad, patterning the insulating dielectric layer, forming a first window in the insulating dielectric layer, and enabling the first window to expose the welding pad, forming a mask layer is formed on the insulating dielectric layer, the mask layer is patterned, a second window is formed in the first window, and the welding pad is exposed out of the second window; forming a first conductive layer in the second window, forming a second conductive layer on the first conductive layer, removing the mask layer to expose the side wall of the first conductive layer, and performing reflow treatment on the second conductive layer, so that the second conductive layer covers the top and the side wall of the first conductive layer at the same time. The reflow treatment process is adopted, the second conductive layers located on the top and the side wall of the first conductive layer are integrally formed, and connecting gaps are eliminated.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a manufacturing method thereof. Background technique [0002] With the development of the chip manufacturing process, the pillar bump technology has gradually become the mainstream technology, and the connection between the chip and the substrate is realized through the pillar bump technology. The existing pillar bump is usually composed of a conductive pillar and a solder cap. Due to the characteristics of the conductive pillars being easily oxidized, the performance of the product has been affected. Especially as the chip density is getting higher and higher, the distance between chips is decreasing, and the size of the stud bump is also gradually reduced. How to effectively protect the surface of the stud bump is particularly important. Contents of the invention [0003] Embodiments of the present invention provide a semiconductor str...

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Problems solved by technology

Due to the characteristics of the conductive pillars being easily oxidized, it has an impact on the performance of the product

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