PXE protocol-based virtual machine starting method and electronic equipment
A virtual machine and virtual host technology, applied in the computer field, can solve the problems of limited iSCSI ID resources, limited number of iSCSI channel connections, DAS storage cannot effectively support high availability, etc., to achieve the effect of ensuring timeliness and reliability
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Embodiment 1
[0049] ginseng Figure 1 to Figure 7A specific implementation manner of a method for starting a virtual machine based on the PXE protocol (hereinafter referred to as the "method") of the present invention is shown.
[0050] In the traditional PXE service, when the client starts, it will uniformly send a broadcast packet to obtain the DHCP information and the system boot program in the TFTP service, and then load the system image stored on the shared file server according to the address in the system additional file. In the existing technology, multiple DHCP servers are not allowed in the same network environment, so in the case of high concurrent requests, the single-point PXE service will encounter the problem of heavy pressure and slow response, resulting in a long time for the virtual machine to start , the loading system is slow. At the same time, since it is a single-point PXE server, if the service fails, all virtual machines under the same network will fail to start. ...
Embodiment 2
[0081] ginseng Figure 8 As shown, this embodiment also discloses an electronic device 500, which includes:
[0082] A processor 51 , a storage device 52 composed of at least one storage unit, and a communication bus 53 establishing a communication connection between the processor 51 and the storage device 52 . The processor 51 is configured to execute one or more programs stored in the storage device 52, so as to implement the method for starting a virtual machine based on the PXE protocol as disclosed in the first embodiment.
[0083] Specifically, the storage device 52 may be composed of a storage unit 521 to a storage unit 52j, wherein the parameter j is a positive integer greater than or equal to 1. Processor 51 may be ASIC, FPGA, CPU, MCU or other physical hardware or virtual device with instruction processing function. The form of the communication bus 53 does not need to be specifically limited, I 2 C bus, SPI bus, SCI bus, PCI bus, PCI-E bus, ISA bus, etc., and can...
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