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Controller applied to multiplexer and multiplexer

A multiplexer and controller technology, applied in the direction of logic circuits with logic functions, etc., can solve the problems of complex circuit structure and logical confusion.

Active Publication Date: 2021-09-14
北京源启先进微电子有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, the multiplexer with priority implemented in the above method realizes the selection of priority through multiple cascaded look-up tables LUT, the circuit structure is relatively complicated, and logic confusion is prone to occur

Method used

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  • Controller applied to multiplexer and multiplexer
  • Controller applied to multiplexer and multiplexer
  • Controller applied to multiplexer and multiplexer

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Embodiment Construction

[0032] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of this application.

[0033] figure 1 A schematic structural diagram of a multiplexer is provided for the embodiment of the present application.

[0034] Such as figure 1 As shown, the multiplexer is used to access m enable signals EN[m-1:0], and n channels of data D 0 -D n-1 , where m enable signals are used to indicate n channels of data D 0 -D n-1 The gating state of m, n is a positive integer greater than 1, n≤2 m .

[0035] Such as figure 1 As shown, the multiplexer includes a controller and a selec...

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Abstract

Embodiments of the present application provide a controller applied to a multiplexer and the multiplexer. The multiplexer is used to access m enable signals EN[m‑1:0], and n channels of data D 0 -D n‑1 , wherein, the m enable signals are used to indicate the gating status of the n-way data, and m and n are positive integers greater than 1; the controller includes n logic gate circuit groups corresponding to the n-way data one-to-one; and i-th road data D i‑1 The corresponding logic gate circuit group is used to access the gating priority higher than and equal to D i‑1 The data corresponds to the enable signal and is output for controlling the D i‑1 The control signal SEL[i‑1] of the strobe state, i=[1, n], i is an integer; the n control signals SEL[n‑1:0] output by n logic gate circuit groups include at least n-1 control signals that control a certain channel of data to be in the non-strobe state.

Description

technical field [0001] The present application relates to the technical field of electronic circuits, in particular to a controller applied to a multiplexer and the multiplexer. Background technique [0002] A multiplexer, also known as a data selector, can select any one of the data through the multiplexer during the transmission of multiple data. [0003] Existing multiplexers are usually integrated in FPGA devices. When users use multiplexers with priority, they need to describe the structure of the multiplexer through codes to complete the parameterized design. FPGA can be based on the look-up table LUT according to Parametric design forms a cascade structure, and the priority of each signal is judged by a lookup table LUT to realize a multiplexer with priority. [0004] However, in the multiplexer with priority implemented in the above manner, the selection of priority is realized through multiple cascaded look-up tables LUT, the circuit structure is relatively complic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K19/20
CPCH03K19/20
Inventor 不公告发明人
Owner 北京源启先进微电子有限公司