Multi-channel parallel computing system for real-time imaging of synthetic aperture radar

Abstract

The invention relates to the technical field of radar real-time imaging processing, and provides a multi-channel parallel computing system for real-time imaging of a synthetic aperture radar, and the system comprises a DDR which is used for storing echo data collected by the synthetic aperture radar; a controller which comprises at least two FIFOs and is used for alternately accessing the DDR through the at least two FIFOs and caching echo data obtained by accessing the DDR through the at least two FIFOs; a calculation module which is used for processing the echo data obtained by accessing the at least two FIFOs based on the calculation task, wherein the working clock of the DDR is larger than the working clock of the FIFOs, the data access broadband of the DDR is matched with the cached data broadband of the at least two FIFOs, and the controller and the calculation module are realized by FPGAs. According to the technical scheme provided by the embodiment of the invention, the cache data broadband of the at least two FIFOs is matched with the data access broadband of the DDR, meanwhile, the DDR is accessed by the at least two FIFOs alternately, and the real-time processing performance of the system is improved based on parallel processing of the at least two FIFOs by the FPGA.

Description

technical field [0001] The invention belongs to the technical field of radar real-time imaging processing, in particular to a multi-channel parallel computing system for synthetic aperture radar real-time imaging. Background technique [0002] Synthetic Aperture Radar (SAR) is a high-resolution imaging radar with many advantages such as all-time, all-weather, and long-distance. Based on the theory of radar imaging, it can be seen that in order to improve the imaging capability of SAR, a large amount of data is needed as support. Therefore, the imaging technology of SAR requires a large amount of data storage and processing. [0003] At present, the raw echo data of the synthetic aperture radar is stored in the third-generation double-data-rate three synchronous dynamic random access memory (DDR3 SDRAM) (hereinafter referred to as DDR3), which can be Programmable logic gate array (Field Programmable GateArray, FPGA) as the processor, FPGA reads the original echo data from DD...

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Problems solved by technology

[0004] However, since the working clock of FPGA is much lower than that of DDR3, the buffer data bandwidth in FPGA will be lower than the data access bandwidth of DDR3, resulting in relatively low real-time processing performance of SAR imaging

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