Instruction caching method and device

A technology of instruction caching and instructions, which is applied in the direction of machine execution devices, program control design, instruments, etc., can solve the problems of increased CPU power consumption, achieve fast reading speed, reduce power consumption, and improve efficiency

CN113204370APending Publication Date: 2021-08-03南京英锐创电子科技有限公司
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Patent Information

Authority / Receiving Office
CN · China
Current Assignee / Owner
Publication Date
2021-08-03

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Abstract

The invention relates to an instruction caching method, which comprises the following steps: responding to an access request signal, and sending out a first reading request; obtaining label data and effective indication data according to the first reading request, wherein the label data and the effective indication data are stored in a register block; judging whether target instruction data exists or not according to the label data, the effective indication data and an access address signal; and if the target instruction data exists, returning the target instruction data to the CPU. According to the instruction caching method, the tag data and the effective indication data are obtained from the register block, the TAG_SRAM originally used for storing the tag data in the cache is replaced, and the problem of high power consumption when a CPU reads a plurality of SRAMs at the same time is solved. Meanwhile, the reading speed between the CPU and the register block is higher than the reading speed between the CPU and the SRAM, so that the instruction caching method can also improve the CPU instruction reading efficiency.
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Description

technical field

[0001] The invention relates to the field of chip circuit design, in particular to an instruction cache method and device. Background technique

[0002] Due to the limitation of memory read speed, the mismatch between memory speed and CPU speed becomes a bottleneck that limits system performance. Based on the time and space limitations of the CPU access program, a small-capacity instruction cache (Instruction Cache, ICACHE) can be used to make up the difference between the CPU and the speed, thereby improving the overall performance of the system. Cache (cache) is one of the important foundations for the high performance of all modern computers. It is generally composed of SRAM, the speed is very fast, and it can perform high-speed data exchange with the CPU. Normally, the CPU first looks for the required data in the cache, and when there is no data required by the CPU in the cache, the CPU accesses it again. When the CPU finds the target data in the cache...

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Embodiment Construction

[0026] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the associated drawings. Preferred embodiments of the invention are shown in the accompanying drawings. However, the present invention can be embodied in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the understanding of the disclosure of the present invention more thorough and comprehensive.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field of the invention. The terms used herein in the description of the present invention are for the purpose of describing specific embodiments only, and are not intended to limit the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of ...