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Enhanced error correction method and deep error correction method based on double-layer raid information

An error correction method and enhanced technology, applied in the direction of error detection/correction, response error generation, redundant code error detection, etc., can solve the problems of different action points and utilization principles, lack of data recovery ability, etc., to achieve The effect of reducing the number of error bits, wide application range, and reducing the number of error bits

Active Publication Date: 2021-11-05
杭州阿姆科技有限公司
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Problems solved by technology

[0007] The present invention proposes an enhanced error correction method and a deep error correction method based on double-layer RAID information. XOR operations are also used. Although XOR operations are found in the three patents, the points of action and the principles of utilization are completely different. ; In addition, when encountering some uncorrectable data that is very important for users, the data recovery capabilities of the above two patents still have certain deficiencies

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  • Enhanced error correction method and deep error correction method based on double-layer raid information
  • Enhanced error correction method and deep error correction method based on double-layer raid information

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Embodiment 1

[0048] Embodiment 1 of the present invention provides an enhanced error correction method based on double-layer RAID information. In this embodiment, there is no limit to which level of RAID structure is specifically used in the flash memory controller, as long as it meets the constraints described below conditions.

[0049] Specifically, such as figure 1 and figure 2 As shown, in the enhanced error correction method based on double-layer RAID information described in this embodiment, when ECC uncorrectable error data appears in the flash memory particles, the error correction method adopted includes the following steps:

[0050] In order to implement the error correction method described in this embodiment, it is necessary to add a layer of RAID protection and sacrifice part of the NAND storage space. Vertical binding can be performed for M' rows of RAID lines, and DXOR_V is the check code data of the vertical RAID lines. The size of M' can be designed according to the re...

Embodiment 2

[0078] The enhanced error correction method based on double-layer RAID information described in Embodiment 1 can solve the ECC uncorrectable scenario encountered by general SSD controllers, and can ensure the smooth progress of normal reading and writing of SSD controllers. When the user encounters some very important uncorrectable data, this embodiment provides a deep error correction method, that is, try to restore the user data without considering the impact on the read delay and read bandwidth of the SSD controller.

[0079] Such as figure 2 As shown, the deep error correction method includes the steps of:

[0080] (1) Find all other uncorrectable data in the horizontal RAID row where DATAX is located;

[0081] (2) Take any uncorrectable data in a horizontal RAID row, and restore it through the enhanced error correction method based on double-layer RAID information described in Embodiment 1. If it can be restored, use the restored new data to overwrite the previous data....

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Abstract

The invention discloses an enhanced error correction method and a deep error correction method based on double-layer RAID information. When ECC uncorrectable error data appears in flash memory particles, the enhanced error correction method includes: S1, determining the uncorrectable data A The address of data A in the horizontal RAID row and vertical RAID row are respectively located at X and Y', 1≤X≤N, 1≤Y'≤M', and the corresponding data are respectively recorded as DATAX and DATAY'; S2 , respectively calculate the values ​​DRAID and DRAID' obtained through horizontal RAID line recovery and vertical RAID line recovery; S3, reread data A to obtain new data DATANew, and perform XOR and bit AND calculation on DATANew to obtain data DATAANew; S4 1. Decode the obtained new frame of data. The invention improves the error correction capability of the SSD error correction algorithm and the lifespan of the NAND particles.

Description

technical field [0001] The invention relates to the technical field of data storage, in particular to an enhanced error correction method and a deep error correction method based on double-layer RAID information. Background technique [0002] SSD (Solid State Drive), commonly known as solid-state hard drive, is a hard disk made of solid-state electronic storage chip arrays. It usually includes three major parts, namely SSD main control chip, flash memory particle array for storing data, and cache chip. Solid-state drives have the characteristics of fast reading and writing, light weight, low energy consumption, and small size that traditional mechanical hard drives do not have, making them widely used in consumer markets, data centers, and enterprise markets. [0003] One of the characteristics of flash memory particles is that different degrees of bit inversion will occur during the life cycle. In order to further improve the life of SSD disks, storage manufacturers will pa...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/10G11C29/42
CPCG06F11/1004G11C29/42
Inventor 廖莎王荣生鲍慧强沈海锋董服洋
Owner 杭州阿姆科技有限公司
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