Three-dimensional memory, preparation method and storage system of three-dimensional memory

Abstract

The present application provides a three-dimensional memory, a preparation method thereof, and a storage system. The preparation method includes: forming a first stacked structure on a substrate defining a preset area; forming a first transition channel hole in a portion of the first stacked structure corresponding to the preset area, and filling the first layer with a first filler A transition channel hole; forming a second lamination structure on the first lamination structure; forming a second transition channel hole in a portion of the second lamination structure corresponding to the first transition channel hole, the second transition channel The hole is at least partially aligned with the first transition channel hole to form a transition channel hole; the second transition channel hole is filled with a second filler, and the aperture size of the first transition channel hole is larger than that of the second transition channel hole size. The transition channel structure prepared according to the method can provide structural support for the operation of removing the gate sacrificial layer in the subsequent formation of the gate, and provide a portion of the subsequently formed multiple word line contacts spaced from the transition channel structure Leave enough space for formation.

Description

technical field [0001] The present application relates to the field of semiconductor design and manufacture, and more particularly, to the structure of a three-dimensional memory (3D NAND), a method for preparing the three-dimensional memory, and a storage system. Background technique [0002] The storage array of the three-dimensional memory includes a core (Core) region and a Stair Step (SS) region, wherein a plurality of dummy channel structures are arranged in the step region, and the dummy channel structure can be a removal gate in a subsequent gate formation process. The operation of the extremely sacrificial layer provides strong structural support. [0003] In the manufacturing process of conventional three-dimensional memory, as the number of stacked layers increases, the three-dimensional memory is generally prepared by a dual stack technology or a multi-stack technology. However, due to the limitation of conventional fabrication process, the critical dimension (t...

AI Technical Summary

Problems solved by technology

In particular, after three-dimensional memory manufacturing processes such as etching, filling, and heat treatment, affected by the heat of the above process, when the gate sacrificial layer is removed during the gate formation process, the above-mentioned dummy channel with a large top and a small bottom The support force of the structure to the bottom laminate structure is weakened

Further, it will also lead to problems such as the decline in electrical performance of the three-dimensional memory

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